Parallel RF Power Amplifier Switching for Backoff Efficiency
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Solution Overview
Problem
Existing RF power amplifiers in portable wireless communication devices suffer from efficiency loss when output power is backed off, leading to unnecessary current consumption and reduced battery life, and existing solutions like power supply modulation and Doherty load modulation incur additional chip-area overhead and are limited to narrowband applications.
Innovation Solution
A power amplification device and system utilizing a current-type parallel power synthesis network with on-chip power switching and dynamic adjustment of power amplifiers and transistors to match transmit power levels, enhancing efficiency without additional overhead and maintaining output bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If output power is backed off in existing RF power amplifiers, then power consumption is reduced, but efficiency is significantly degraded
Solution Approach 1:
The power amplifier is divided into multiple parallel amplification circuits (e.g., first and second power amplification circuits) that can be independently controlled. By selectively activating only the necessary number of circuits based on the required output power level, the system maintains high efficiency even when operating at backed-off power levels, as each active circuit operates near its optimal efficiency point.
Solution Approach 2:
The system dynamically adjusts the configuration of power amplification circuits based on the required output power level. The control unit selectively enables or disables specific circuits according to the transmit power level, allowing the amplifier to adapt its efficiency characteristics to match the operating conditions, thereby maintaining high efficiency across varying power levels.
2Loss of energy
If power supply modulation or Doherty load modulation is used to improve backoff efficiency, then amplifier efficiency is improved, but chip area increases
Solution Approach 1:
Multiple power amplification circuits are merged in parallel to achieve the desired output power levels. By combining the outputs of multiple circuits through a power combiner, the system achieves high backoff efficiency without requiring complex modulation schemes, thereby avoiding the additional chip area overhead associated with power supply modulation or Doherty load modulation circuits.
3Loss of energy
If existing efficiency improvement solutions are implemented, then backoff efficiency is improved, but bandwidth is limited to narrowband applications
Solution Approach 1:
The parallel power amplification circuit architecture provides a universal solution that maintains high backoff efficiency across wide bandwidths. Each amplification circuit can be designed to cover the full bandwidth, and by selectively activating circuits based on power level requirements, the system achieves both high efficiency and wideband operation, making it suitable for modern wideband communication standards.
4Loss of energy
If multiple power amplification circuits are used to maintain efficiency at backed-off power levels, then backoff efficiency is improved, but device complexity increases
Solution Approach 1:
The control unit automatically selects and activates the appropriate power amplification circuits based on the required output power level, without requiring complex manual configuration or external intervention. This self-service approach simplifies the overall system design by automating the selection process, thereby managing device complexity while maintaining high backoff efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves backoff efficiency to near peak power efficiency across various power levels, reducing unnecessary energy consumption and extending battery life in portable devices.
Implementation Method 1
a transformer network coupled to the plurality of power amplification circuits and configured to provide an output power that matches a transmit power level based on the plurality of amplified outputs
Data Source
AI summary
In certain aspects, a power amplification device, a power amplification system, and an operation method thereof are disclosed. The power amplification system includes a power amplification device and a control unit. The power amplification device includes a plurality of power amplification circuits, a power supply network configured to supply a power source from a plurality of power sources to the plurality of power amplification circuits, and a transformer network configured to provide an output power that matches a transmit power level. The control unit includes a memory storing code and a processor coupled to the memory. When the code is executed, the processor is configured to determine a plurality of circuit configurations for the plurality of power amplification circuits based on the transmit power level, and configure the plurality of power amplification circuits using the plurality of circuit configurations, respectively, so that the output power matches the transmit power level.


