RF Amplifier Bias Offset Using Dual Drain-Biased FETs
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Solution Overview
Problem
Existing radio frequency amplifiers face challenges in achieving linear operation without consuming excessive current, degrading noise performance, or sacrificing bias voltage gain controllability, particularly in mobile wireless telephone handsets where large signal inputs can drive power amplifiers into nonlinear operation.
Innovation Solution
The use of a radio frequency amplifier design that includes two field effect transistors with differently biased drains and gates, where the difference in drain or gate bias voltages creates an offset voltage to reduce third-order transconductance and intermodulation distortion, maintaining a constant offset during operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single field effect transistor is used to amplify radio frequency signals, then the amplifier can operate with simpler circuitry, but the linearity is degraded due to third-order transconductance and intermodulation distortion
Solution Approach 1:
The amplifier is segmented into two parallel field effect transistor branches. Each transistor processes the input signal independently with different bias conditions, and their outputs are combined. This segmentation allows the third-order transconductance components from each transistor to cancel each other out, improving linearity while maintaining manageable circuit complexity through the systematic parallel structure.
Solution Approach 2:
Different bias conditions are applied to different transistors in the parallel configuration. The first transistor operates with bias voltage Vbias1 and the second with Vbias2, creating local quality differences in their transconductance characteristics. This local differentiation enables destructive interference of third-order distortion products while preserving the fundamental signal amplification.
2Reliability
If bias voltage is increased to improve linearity, then third-order transconductance is reduced, but current consumption increases excessively
Solution Approach 1:
The invention changes the bias voltage parameter differently for each transistor in the parallel configuration. By setting Vbias1 and Vbias2 to different values, the transconductance parameters gm1 and gm2 are optimized independently. This allows the amplifier to achieve improved linearity through parameter differentiation rather than uniformly increasing bias voltages across all transistors, thereby controlling current consumption.
3Reliability
If multiple field effect transistors with different bias voltages are used, then third-order transconductance is reduced and linearity is improved, but the device complexity increases
Solution Approach 1:
Two field effect transistor amplification paths are merged in parallel, with their outputs combined at a common output node. This merging approach allows the individual third-order distortion products from each transistor to cancel each other constructively while maintaining the amplified fundamental signal. The parallel merging structure achieves linearity improvement without requiring complex cascaded or feedback configurations.
Data Source
AI summary
Aspects of this disclosure relate to linearized radio frequency amplifiers. A radio frequency amplifier can include first and second field effect transistors configured to receive a radio frequency input signal and provide first and second intermediate amplified signals, respectively. The first field effect transistor can have a first source and a first drain electrically biased at a first drain bias voltage and the second field effect transistor can have a second source and a second drain electrically biased at a second drain bias voltage different from the first drain bias voltage. The radio frequency amplifier can be configured to generate a combined output signal comprising the first and second intermediate amplified signal.