RF Amplifier Bonding Layout to Limit Parasitic Capacitance
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Solution Overview
Problem
Semiconductor devices with bonded substrates of different thermal conductivities face parasitic capacitance issues due to metal bonding layers, leading to interference and degradation of radio-frequency amplifier circuit characteristics, including oscillation.
Innovation Solution
A semiconductor device design where a conductor pattern covers power stage transistors but does not overlap input-side circuit elements, reducing parasitic capacitance and maintaining effective heat dissipation through strategic bonding member placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a metal bonding layer is provided all over the bonding interface to ensure heat dissipation, then heat dissipation is improved, but parasitic capacitance increases causing interference and characteristics degradation
Solution Approach 1:
The bonding layer is divided into two distinct conductor patterns: a first conductor pattern that covers the power stage transistor for heat dissipation, and a second conductor pattern that is separated from the input-side circuit element to avoid parasitic capacitance. This segmentation allows each region to serve its specific function without interference.
Solution Approach 2:
Different regions of the bonding layer are assigned different functions: the first conductor pattern provides thermal conduction over the power stage transistor, while the second conductor pattern is positioned to avoid overlapping with the input-side circuit element, thus creating local variations in electrical properties to minimize parasitic capacitance in critical areas.
2Temperature
If the bonding layer covers the power stage transistor for heat dissipation, then heat dissipation is improved, but coupling between power stage transistor and input-side circuit element increases causing oscillation
Solution Approach 1:
The bonding layer is segmented into separate conductor patterns with different spatial distributions. The first conductor pattern is positioned to cover the power stage transistor for effective heat dissipation, while the second conductor pattern is deliberately separated from the input-side circuit element in plan view, reducing electromagnetic coupling and preventing oscillation.
Solution Approach 2:
The separated second conductor pattern acts as an intermediary structure that maintains the bonding function while introducing electrical isolation. By positioning this conductor pattern away from the input-side circuit element, it serves as a thermal conduction path without creating harmful parasitic capacitance that would cause oscillation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design minimizes the strength of coupling between the power stage transistors and input-side circuit elements, suppressing characteristics deterioration and oscillation while ensuring heat dissipation, thereby enhancing the performance of radio-frequency amplifier circuits.
Implementation Method 1
Heat dissipation is ensured when heat generated in a transistor of the radio-frequency amplifier circuit is conducted to the other one of the substrates through the bonding layer
Implementation Method 2
A parasitic capacitance is generated between the bonding layer made of metal and a wire or a circuit element in the radio-frequency amplifier circuit formed on or in the one of the substrates
Data Source
AI summary
A semiconductor device includes first and second members. A second surface of the second member is opposite to a first surface of the first member. A radio-frequency amplifier circuit is included in the second member. The first and second members are bonded to each other by an electrically conductive bonding member between the first and second surfaces. The radio-frequency amplifier circuit includes at least one power stage transistor, an input wire that is connected to the power stage transistor and supplies an input signal to the power stage transistor, and an input-side circuit element that is connected to the input wire and that includes at least one of a passive element, an active element, and an external connection terminal. The bonding member includes a first conductor pattern covering the power stage transistor in plan view. The input-side circuit element is disposed outside the first conductor pattern in plan view.