Two-Stage RF Power Amplifier Layout for Heat Dissipation

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Solution Overview

Problem

Radio-frequency power amplifiers face issues with heat dissipation in field-effect transistors, leading to potential deterioration of amplification characteristics and reliability due to temperature rises.

Innovation Solution

A power amplifying device is designed with smaller first unit transistors connected in parallel, which are dispersed to reduce heat concentration, and larger second unit transistors, along with efficient heat dissipation through module back-surface electrodes and stripe-type bumps, maintaining amplification characteristics and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If FETs are used for high-power amplification, then amplification capability is improved, but heat generation increases causing temperature rise

Engineering Contradiction:
Improveamplification capabilityVSAvoidtransistor temperature
Core Design Contradiction:
PowerVSTemperature

Solution Approach 1:

The amplifier is divided into multiple stages (first amplification stage and second amplification stage) with each stage using FETs of different sizes. The first stage uses smaller FETs for initial amplification while the second stage uses larger FETs for final high-power amplification. This segmentation allows heat generation to be distributed across stages rather than concentrated in a single high-power transistor.

Inventive Principle:
Principle #1Segmentation

2Power

If larger FETs are used for high-power amplification, then output power is improved, but device area increases

Engineering Contradiction:
Improveoutput powerVSAvoiddevice area
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The power amplification function is segmented into two stages with different power levels. The first amplification stage handles lower power with smaller FETs, and the second amplification stage handles higher power with larger FETs. This segmentation achieves high overall output power while keeping the area of individual transistors manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes vertical stacking of amplifier stages in the signal flow dimension rather than simply increasing the area of single transistors in the planar dimension. By adding a temporal/stage dimension to the power amplification process, high output power is achieved without proportionally increasing the device footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Power

If multiple amplification stages are used, then amplification capability is improved, but device complexity increases

Engineering Contradiction:
Improveamplification capabilityVSAvoidcircuit complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The amplifier is segmented into two functional stages with clear division of labor. The first amplification stage performs initial signal amplification with smaller FETs, and the second amplification stage performs final power amplification with larger FETs. This segmentation provides a systematic approach to achieving high amplification capability while maintaining manageable circuit complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240243703A1Power amplifying device
Publication Date: 2024.07.18 MURATA MFG CO LTD
  • US20240243703A1 patent drawing
  • US20240243703A1 patent drawing
  • US20240243703A1 patent drawing

AI summary

A power amplifying device includes first unit transistors and second unit transistors. The first unit transistors are connected in parallel and configured to amplify a radio frequency signal and to output a resultant signal. The second unit transistors are connected in parallel and configured to amplify the signal output by the first unit transistors and to output a resultant signal. Each of the first unit transistors is smaller than each of the second unit transistors.