RF Amplifier Capacitive Compensation for LNA Input Resistance
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Solution Overview
Problem
RF amplifiers in wireless receiver applications face issues with loading the low noise amplifier (LNA), degrading its input resistance, gain, frequency selectivity, and noise performance due to parasitic capacitances and common mode voltage deviations.
Innovation Solution
The RF amplifier design includes pairs of transistors and capacitors to minimize input resistance degradation and a control circuit with a comparator and DAC to regulate common mode voltage, using correction capacitances and biasing elements to enhance input resistance and maintain desired voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the amplifier is coupled between LNA and mixer to prevent mixer loading, then the LNA protection is improved, but the input resistance degradation due to parasitic capacitance worsens
Solution Approach 1:
The patent introduces an intermediary circuit between the LNA and the amplifier that actively compensates for the harmful effects of parasitic capacitance. This intermediary mechanism senses the phase delay caused by parasitic capacitance and applies corrective signals to maintain high input resistance, thus protecting the LNA while eliminating the harmful loading effect.
Solution Approach 2:
The patent dynamically adjusts circuit parameters (such as biasing conditions and feedback factors) to counteract the frequency-dependent effects of parasitic capacitance. By changing operating parameters in response to detected phase delays, the system maintains optimal input resistance across different frequencies while preserving the LNA protection function.
2Ease of operation
If parasitic capacitance is present in the amplifier, then the amplifier can operate, but the input resistance is degraded and LNA performance is affected
Solution Approach 1:
The patent implements feedback mechanisms that monitor the actual input resistance and phase delay caused by parasitic capacitance, then automatically adjust circuit operating points to compensate for these effects. This feedback loop ensures that despite the presence of parasitic capacitance, the amplifier maintains the required input resistance specifications and does not degrade LNA performance.
3Power
If phase delay from input to output deviates from 180 degrees, then the amplifier gain is affected, but the input resistance degradation worsens
Solution Approach 1:
The patent employs dynamic adjustment mechanisms that continuously adapt circuit parameters in response to phase delay variations. When phase delay deviates from the ideal 180 degrees, the system dynamically modifies biasing conditions and feedback factors to simultaneously maintain both the required gain and input resistance, preventing the trade-off between these two parameters.
Data Source
AI summary
An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair.