RF Power Amplifier Output Combining for Wideband Efficiency

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Solution Overview

Problem

Conventional radio frequency power amplifiers face challenges with low efficiency and narrow bandwidth, making it difficult to meet the requirements of low energy consumption, large bandwidth, and high throughput in current mobile communication systems, and they are also bulky due to the need for additional peripheral circuits outside the chip.

Innovation Solution

The radio frequency power amplifying chip integrates a combined output circuit within the package, reducing the impact of parasitic characteristics of packaging pins by combining amplified signals internally before connecting them to external impedance matching circuits, and includes a drain voltage bias circuit to minimize efficiency loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the combined output circuit is integrated within the chip package, then bandwidth and efficiency are improved, but device complexity increases

Engineering Contradiction:
ImprovebandwidthVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent integrates the combined output circuit within the chip package, merging the power combining network with the amplifier chips. This integration eliminates the need for separate external combining circuits, reducing the impact of parasitic characteristics and improving bandwidth while maintaining high efficiency operation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated combined output circuit serves multiple functions: it combines power from multiple amplifying branches, provides impedance matching, and reduces parasitic effects. This multi-functionality allows the circuit to improve bandwidth and efficiency without requiring separate dedicated components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If additional peripheral circuits are added outside the chip, then power combining capability is improved, but the amplifier size increases

Engineering Contradiction:
Improvepower combining capabilityVSAvoidamplifier size
Core Design Contradiction:
PowerVSVolume of moving object

Solution Approach 1:

The patent merges the power combining network with the amplifier chips by integrating it within the same package. This eliminates the need for additional external peripheral circuits, reducing the overall amplifier size while maintaining full power combining capability through the integrated inductors and capacitors.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The combined output circuit is nested within the chip package, with inductors and capacitors integrated alongside the amplifying branches. This nesting approach allows the power combining function to be embedded within the existing chip structure, avoiding the need for separate external circuits and reducing overall device volume.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Loss of energy

If the combined output circuit is integrated within the chip package, then efficiency is improved, but manufacturing complexity increases

Engineering Contradiction:
ImproveefficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The integration of the combined output circuit within the chip package reduces the number of external connections and parasitic elements, improving efficiency by minimizing energy losses. The manufacturing complexity is managed through standardized integration processes that combine multiple functions in a single package.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the combined output circuit from the external peripheral area and places it within the chip package. This extraction improves efficiency by reducing parasitic characteristics associated with external connections, while the integration is performed using established manufacturing techniques that balance complexity with performance benefits.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP4580050A1Radio frequency power amplifying chip, radio frequency power amplifier, and wireless signal transmitting system
Publication Date: 2025.07.02 SUZHOU WATECH ELECTRONICS CO LTD
  • EP4580050A1 patent drawingFigure 1~2
  • EP4580050A1 patent drawingFigure 3~4
  • EP4580050A1 patent drawingFigure 5~6

AI summary

Disclosed are a radio frequency power amplifying chip, a radio frequency power amplifier, and a wireless signal transmitting system. The radio frequency power amplifying chip includes a first amplifying branch, a second amplifying branch, and a combined output circuit comprising: a first inductor having a first end connected to an output port of the first amplifying branch; a second inductor having a first end connected to an output port of the second amplifying branch; a third inductor having a first end connected to a second end of the second inductor; a first capacitor having a first end connected between a second end of the second capacitor and the first end of the third capacitor; and a fourth inductor having a first end connected to the first end of the first capacitor, and a second end connected to the drain voltage bias circuit of the radio frequency power amplifier.