RF Amplifier Module with Patterned Ground Plane for Inductive Coupling Reduction
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Solution Overview
Problem
High power RF semiconductor devices using wirebond arrays face issues with inductive coupling and complex, costly assembly processes, which affect device performance and cost due to the inclusion of wirebond arrays in RF amplifiers.
Innovation Solution
The implementation of high-Q impedance matching circuits on semiconductor substrates with patterned back metal, eliminating the need for wirebond arrays by using physically separated input, output, and ground ports, and integrating impedance matching circuits directly on the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wirebond arrays are used to achieve high-Q inductors, then inductor quality factor is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the inductor function into the substrate's ground structure by creating a patterned ground plane with isolated ground regions. This integration eliminates the need for separate wirebond array inductors while maintaining high-Q performance through controlled inductance in the ground path, thereby reducing device complexity and manufacturing cost.
Solution Approach 2:
The patent introduces an intermediary structure - a patterned ground plane with specific geometric features - that serves dual purposes: providing ground reference and creating the required inductance. This intermediary eliminates the need for separate wirebond arrays while achieving the desired electrical characteristics.
2Reliability
If wirebond arrays are used to provide inductance, then inductor performance is improved, but manufacturing cost and assembly complexity increase
Solution Approach 1:
The patent combines the ground plane and inductor functions into a single integrated structure. The patterned ground plane with isolated regions provides both ground reference and the necessary inductance, eliminating separate wirebond array components and reducing manufacturing cost.
Solution Approach 2:
The ground plane structure serves itself by providing both ground reference and inductance functionality. The patterned ground plane creates controlled inductance through its geometric design, eliminating the need for external wirebond arrays and reducing assembly complexity.
3Reliability
If wirebond arrays are used to achieve desired inductances, then inductor quality is improved, but inductive coupling between components increases
Solution Approach 1:
The patent segments the ground plane into isolated ground regions separated by controlled distances. This segmentation creates discrete inductance paths while minimizing unwanted inductive coupling between different circuit components, as each ground region is electrically isolated from others.
Solution Approach 2:
The patent applies different ground plane configurations in different locations - isolated ground regions near sensitive components and continuous ground regions in other areas. This local variation optimizes inductance characteristics while controlling inductive coupling in specific problem areas.
4Reliability
If wirebond arrays are used for inductance, then high-Q inductors are achieved, but assembly process complexity and equipment requirements increase
Solution Approach 1:
The patent merges inductor fabrication into the standard semiconductor manufacturing process by creating patterned ground planes during substrate fabrication. This integration eliminates the need for specialized wirebond array attachment equipment and complex back-end assembly processes.
Solution Approach 2:
The patent replaces the mechanical wirebond array attachment process with a semiconductor fabrication process. The inductors are created through standard photolithography and etching processes that form patterned ground planes, eliminating the need for specialized mechanical wirebonding equipment.
Data Source
AI summary
An amplifier module includes a module substrate. Conductive interconnect structures and an amplifier device are coupled to a top surface of the module substrate. The interconnect structures partially cover the module substrate top surface to define conductor-less areas at the top surface. The amplifier device includes a semiconductor substrate, a transistor, a conductive feature coupled to a bottom surface of the semiconductor substrate and to at least one of the interconnect structures, and a filter circuit electrically coupled to the transistor. The conductive feature only partially covers the semiconductor substrate bottom surface to define a conductor-less region that spans a portion of the bottom surface. The conductor-less region is aligned with at least one of the conductor-less areas at the module substrate top surface. The filter circuit includes a passive component formed over a portion of the semiconductor substrate top surface that is directly opposite the conductor-less region.