RF Power Amplifier Switching Paths for Wide-Range Efficiency

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Solution Overview

Problem

Conventional high frequency power amplifiers fail to improve operating efficiency when output power is as small as 17 dBm or below, limiting their effectiveness over a wide output power range.

Innovation Solution

A high frequency power amplifier design featuring first and second transistors connected in parallel, with switches and matching circuits that allow the amplifier to select the most efficient transistor based on output power requirements, ensuring optimal efficiency across a wide range by routing the signal through different paths depending on the desired output power level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a single transistor route is used for large power output operation, then large power output of 27.5 dBm is achieved, but operating efficiency deteriorates when output power is as small as 17 dBm or below

Engineering Contradiction:
Improveoutput powerVSAvoidoperating efficiency
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The power amplifier is segmented into multiple parallel transistor routes (first and second transistors) with different output power capabilities. The first transistor is designed for large power output operation while the second transistor is optimized for medium and small power output operation. This segmentation allows the system to select the most efficient transistor based on the required output power level, thereby maintaining high operating efficiency across a wide output power range from -50 dBm to 27.5 dBm.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between different transistor routes based on the required output power level. Switching control means are provided to selectively activate either the first transistor for large power output or the second transistor for medium and small power output. This dynamic adaptation ensures that the amplifier operates at peak efficiency regardless of whether the output power requirement is high or low, resolving the contradiction between maintaining high power capability and achieving high efficiency at low power levels.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If conventional high frequency power amplifier routes are used, then large power output operation is optimized, but operating efficiency cannot be improved over a wide output power range

Engineering Contradiction:
Improveoutput power rangeVSAvoidoperating efficiency
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The power amplifier is designed with multi-functionality by incorporating both a first transistor route optimized for large power output and a second transistor route optimized for medium and small power output. Both routes share common input and output circuits, allowing the amplifier to universally handle a wide output power range from -50 dBm to 27.5 dBm. The switching control means enable the system to select the appropriate route based on power requirements, achieving both wide adaptability and high operating efficiency across all power levels.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8207790B2High frequency power amplifier
Publication Date: 2012.06.26 MURATA MFG CO LTD
  • US8207790B2 patent drawing
  • US8207790B2 patent drawing
  • US8207790B2 patent drawing

AI summary

A high frequency power amplifier includes first and second transistors connected in parallel and amplifying a high frequency signal; a first switch connected to outputs of the first and second transistors and which connects an input terminal selectively to first and second output terminals; a third transistor amplifying a signal output from the first output terminal of the first switch; and a second switch having a first input terminal connected to the third transistor, a second input terminal connected to the second output terminal of the first switch, and which selectively connects the first and the second input terminals to an output terminal of the second switch.