RF Amplifier Cascade Topology for High Output Voltage Swing

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Solution Overview

Problem

Existing RF amplifiers face challenges in effectively mitigating parasitic inductance while using short length MOSTs to handle large output voltage swings, particularly in applications with high impedance loading conditions.

Innovation Solution

The RF amplifier design incorporates a cascade configuration of N-type and P-type common-source and common-gate amplifiers, coupled with a source coupling capacitor and gate coupling capacitors to short-circuit parasitic inductance, and employs a trifilar transformer for signal distribution, maintaining high gate impedance to manage voltage stress and preserve voltage gain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If short length MOSTs are used, then manufacturing precision and integration are improved, but the ability to handle large output voltage swing deteriorates

Engineering Contradiction:
ImproveMOST length precisionVSAvoidvoltage swing handling capability
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The amplifier is divided into multiple stages: a first common-source amplifier stage and a second common-source amplifier stage, each with its own MOST devices. This segmentation allows each stage to use short length MOSTs for good manufacturing precision while the multi-stage architecture collectively provides the voltage gain and voltage swing handling capability that would be difficult to achieve with a single short MOST.

Inventive Principle:
Principle #1Segmentation

2Power

If common-source amplifier configuration is used, then voltage gain is improved, but parasitic inductance effects worsen

Engineering Contradiction:
Improvevoltage gainVSAvoidparasitic inductance
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

A current recycling circuit is introduced as an intermediary between the two common-source amplifier stages. This circuit recycles the AC component of the tail current and feeds it back to the tail nodes of the first common-source amplifier, effectively counteracting the parasitic inductance effects while preserving the voltage gain benefits of the common-source configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The current recycling circuit implements a feedback mechanism where the AC tail current is sensed and fed back to the tail nodes of the first common-source amplifier. This feedback action compensates for the parasitic inductance by providing a counteracting current that maintains signal integrity and reduces the harmful effects of parasitic inductance on the voltage gain.

Inventive Principle:
Principle #23Feedback

3Ease of operation

If high impedance loading is applied, then output voltage swing is improved, but stability deteriorates

Engineering Contradiction:
Improveoutput voltage swingVSAvoidoperational stability
Core Design Contradiction:
Ease of operationVSStability of the object's composition

Solution Approach 1:

The current recycling circuit provides stabilizing feedback by sensing the AC tail current and feeding it back to the tail nodes. This feedback mechanism maintains operational stability even when high impedance loading is applied, as it actively compensates for variations in the output conditions and prevents instability that would otherwise occur with high impedance loads.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260031773A1Radio-frequency amplifier accommodating high output voltage swing
Publication Date: 2026.01.29 REALTEK SEMICON CORP
  • US20260031773A1 patent drawing
  • US20260031773A1 patent drawing
  • US20260031773A1 patent drawing

AI summary

An RFA (radio frequency amplifier) includes an NCSA (N-type common-source amplifier) established upon a first source node and configured to receive a first signal and output a first internal current; a first NCGA (N-type common-gate amplifier) configured to receive the first internal current and output a second internal current; a second NCGA configured to receive the second internal current and output a first output current; a PCSA (P-type common-source amplifier) established upon a second source node and configured to receive a second signal and output a third internal current; a first PCGA (P-type common-gate amplifier) configured to receive the third internal current and output a fourth internal current; a second PCGA configured to receive the fourth internal current and output a second output current; and a load network comprising a parallel connection of a primary inductor and a tuning capacitor configured to establish an output signal.