RF Analog Predistortion for Broadband Power Amplifier Linearization
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Solution Overview
Problem
Conventional techniques are inadequate and uneconomical for linearizing power amplifiers with bandwidth exceeding 100 MHz, as they require high sampling rates and are constrained by power and cost limitations.
Innovation Solution
A method and RF linearizer system that includes a quadrature up-converter, RF analog predistorter, error monitor, and signal analyzer to optimize coefficients for predistorting the input signal, using finite impulse response filters and polynomial circuits to reduce mean square error, and compensating for memory effects with delay filters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital pre-distortion (DPD) circuitry is used to linearize the power amplifier, then linearization performance is improved, but the sampling rate requirement exceeds 5 times the RF signal bandwidth, making it uneconomical and impractical
Solution Approach 1:
The patent replaces digital pre-distortion circuitry with analog pre-distortion circuitry. Specifically, it uses analog polynomial circuits (including analog multipliers and summers) to implement the predistortion function that would otherwise require high-speed digital signal processing. This substitution eliminates the need for high sampling rates while achieving the same linearization goal.
Solution Approach 2:
The patent changes the operating parameters of the pre-distortion system by moving from digital domain operation (requiring high sampling rates) to analog domain operation (operating at the RF signal bandwidth). The analog polynomial circuits process the signal continuously in the analog domain, fundamentally changing the speed and timing parameters of the system.
2Reliability
If conventional linearization techniques are applied to broadband signals, then linearization is achieved, but power consumption and system cost increase significantly
Solution Approach 1:
The patent substitutes digital processing systems with analog polynomial circuits, which consume less power for broadband signal processing. The analog multipliers and summers operate continuously without the power-hungry analog-to-digital conversion and high-speed digital processing required by conventional DPD approaches.
3Measurement precision
If high sampling rates are used in DPD to handle broadband signals, then signal fidelity is maintained, but system cost and complexity increase
Solution Approach 1:
The patent replaces high-speed digital sampling systems with analog polynomial circuits that process the broadband signal in the analog domain. The analog multipliers compute the polynomial functions (x², x³, etc.) directly from the analog input signal, maintaining signal fidelity without requiring high sampling rates or complex digital processing chains.
Data Source
AI summary
An RF linearizer and an associated method are provided for linearizing a power amplifier. The RF linearizer may include: (a) a quadrature up-converter for up-converting a baseband input signal that is to be transmitted by the power amplifier; (b) an RF analog predistorter controlled by a set of coefficients for predistorting the up-converted input signal; (c) a down-converter for down-converting an output signal of the power amplifier; (d) an error monitor receiving the down-converted output signal and the input signal for providing an error signal; and (e) a signal analyzer receiving the error signal, the signal analyzer using an out-of-band power spectrum of the error signal to optimize the set of coefficients. The input signal may have an in-phase component and a quadrature component.