RF to Baseband Clock Frequency Selection for GSM and WCDMA
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Solution Overview
Problem
Existing radio transmission systems face complexity and noise interference issues when converting data and clock signals between radio frequency and baseband circuits, consuming processing power and affecting device performance.
Innovation Solution
Selecting a clock frequency that is a rational multiple of the GSM symbol rate and WCDMA chipping rate, allowing generation using a 38.4 MHz or 19.2 MHz reference clock with a non-fractional Phase Locked Loop clock multiplier, and using frequencies like 112.64 MHz, 199.68 MHz, 225.28 MHz, and 337.92 MHz to reduce noise interference and simplify conversions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional clock frequency selection is used for signal conversion between RF and baseband circuits, then signal transmission can be achieved, but noise interference and spurious emissions increase within radio frequency bands
Solution Approach 1:
The patent applies parameter changes by selecting specific clock frequency values that are rational multiples of both GSM symbol rate (0.270833 MHz) and WCDMA chipping rate (3.84 MHz). This frequency parameter selection ensures that harmonics fall outside GSM, WCDMA, and LTE bands, thereby reducing noise interference and spurious emissions while maintaining compatibility with both communication standards without requiring complex conversion operations
Solution Approach 2:
The patent implements universality by choosing a clock frequency that serves multiple functions simultaneously: it is compatible with both GSM and WCDMA standards, enables integer multiple relationships with both symbol rate and chipping rate, and generates harmonics that avoid interference with multiple radio frequency bands (GSM, WCDMA, and LTE), thereby eliminating the need for separate frequency planning for different standards
2Productivity
If complex conversion operations are implemented between data signals and radio signals, then signal accuracy can be maintained, but processing time and power consumption increase
Solution Approach 1:
The patent applies preliminary action by pre-selecting a clock frequency that inherently satisfies the requirements of both GSM and WCDMA standards. This frequency is chosen in advance to be a rational multiple of both the GSM symbol rate and WCDMA chipping rate, allowing the system to perform simple integer multiple relationships during signal conversion rather than requiring complex real-time processing operations
Solution Approach 2:
The patent changes the clock frequency parameter to specific values (such as 112.64 MHz, 199.68 MHz, 225.28 MHz, or 337.92 MHz) that enable efficient signal conversion. These parameter selections allow the use of non-fractional Phase Locked Loop clock multipliers and output dividers, eliminating the need for division operations and reducing processing complexity, power consumption, and conversion time
3Adaptability or versatility
If clock frequency is selected to be compatible with both GSM and WCDMA standards, then multi-standard support is achieved, but frequency selection becomes more constrained
Solution Approach 1:
The patent implements universality by selecting a clock frequency that simultaneously satisfies the requirements of both GSM and WCDMA standards. The frequency is chosen to be a rational multiple of both the GSM symbol rate (0.270833 MHz) and WCDMA chipping rate (3.84 MHz), enabling the system to support multiple communication standards with a single frequency configuration
Solution Approach 2:
The patent applies parameter changes by defining specific clock frequency values that inherently possess the rational multiple relationship with both GSM and WCDMA rates. This parameter selection simplifies frequency planning by providing discrete frequency options (112.64 MHz, 199.68 MHz, 225.28 MHz, 337.92 MHz) that automatically ensure compatibility with both standards without requiring complex frequency coordination
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces noise interference and simplifies signal conversions, improving device performance by aligning clock frequencies with GSM, WCDMA, and LTE bands while avoiding unwanted harmonics, thus enhancing the efficiency of data transmission.
Implementation Method 1
a non-fractional Phase Locked Loop clock multiplier
Data Source
AI summary
A method, device and computer program product is provided for sending a data signal and a clock signal between a radio frequency circuit of a device and a baseband circuit of the device, the radio frequency circuit being configured for at least one of transmission and reception of radio signals in a radio frequency band, where the clock signal has a clock frequency Fc. The method comprises selecting the clock frequency Fc to be a rational multiple of the 0.270833 MHz symbol rate of the Global System for Mobile Communications (GSM) standard and a rational multiple of the 3.84 MHz chipping rate of the Wideband Code Division Multiple Access (WCDMA) interface. The clock frequency Fc is selected such that the clock signal can be generated using a 38.4 MHz or 19.2 MHz reference clock signal, a non-fractional Phase Locked Loop clock multiplier and an output divider, without first having to divide down the reference clock signal. The data signal and the clock signal can then be sent between the radio frequency circuit and the baseband circuit using the selected clock frequency Fc.