RF Power Amplifier Package Bias Layout for Lower Inductance
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Solution Overview
Problem
RF power amplifiers in wireless communication networks face inefficiencies due to their operation below the compression point, leading to wasted power as heat, especially in high-Peak to Average Power Ratio (PAPR) signals, and challenges in compact design and integration of Doherty amplifiers on a package due to bias voltage feed inductance and pin/connector spacing.
Innovation Solution
Coupling at least one bias voltage to amplifier circuits via two or more pins/connectors in parallel, reducing inductance and allowing for flexible placement and routing, thereby improving linearity and compactness of RF power amplifier circuits on a package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single pin/connector is used for bias voltage connection, then the device complexity is reduced, but the inductance is higher which degrades linearity and efficiency
Solution Approach 1:
The bias voltage connection is segmented into multiple parallel pins/connectors instead of using a single connection. This segmentation reduces the total inductance by distributing the current path across multiple lower-inductance parallel paths, directly resolving the contradiction between device complexity and energy loss.
2Area of stationary object
If pins/connectors are placed close together for compact design, then the area is reduced, but the inductance increases which affects linearity
Solution Approach 1:
The patent applies local quality by optimizing the specific geometric arrangement and spacing of the parallel pins/connectors. By carefully controlling the local geometry of the bias voltage connection paths, the design achieves low inductance despite compact overall package area, resolving the contradiction between compactness and electrical performance.
3Loss of information
If the amplifier operates below compression point for linearity, then signal fidelity is improved, but efficiency deteriorates due to power waste as heat
Solution Approach 1:
The patent changes the electrical parameters of the bias voltage connection system by using multiple parallel pins/connectors with optimized spacing and geometry. This parameter change reduces the connection inductance, which enables the amplifier to achieve better linearity at a given operating point and reduces the penalty for operating below compression, thereby addressing the efficiency-linearity tradeoff.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the efficiency and linearity of RF power amplifiers by reducing bias voltage pin/connector inductance, moving resonance away from the operating band, and simplifying the layout, which is crucial for high-PAPR signals and compact designs in modern wireless communication systems.
Implementation Method 1
the two or more bias voltage pins/connectors are connected together on the package, placing the pins/connectors in parallel, which reduces an inductance associated with the pins/connectors
Data Source
AI summary
In integrating RF power amplifier circuits on a package, at least one bias voltage is coupled to at least one amplifier circuit on the package via two or more pins/connectors. In particular, at least one of a gate and drain bias voltage is coupled to one or more amplifier circuits via at least two pins/connectors. In some embodiments, the two or more bias voltage pins/connectors are connected together on the package, placing the pins/connectors in parallel, which reduces an inductance associated with the pins/connectors. In some embodiments, at least of the two pins/connectors connected to the same bias voltage are disposed on either side of an RF signal pin/conductor, simplifying the routing of signals on the package, affording greater flexibility of placement and routing on the package.