RF Amplifier Bias Circuit for Process-Spread-Stable Linearity
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Solution Overview
Problem
RF power amplifiers' bias current is sensitive to process spread, particularly for NPN bipolar transistors, which affects the beta parameter, leading to instability in output power linearity.
Innovation Solution
A bias circuit design incorporating multiple transistors configured as current mirrors, variable capacitors, and current sources to adaptively control bias conditions, including a first current mirror with a resistor and a variable capacitor to stabilize bias current and improve linearity, and additional transistors for enhanced trimming capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a common-emitter adaptive bias circuit uses the rectification effect to increase the Vbe bias voltage with increasing output power, then the linearity of the RF amplifier is enhanced, but the bias current becomes very sensitive to process spread, particularly for NPN bipolar transistors
Solution Approach 1:
The bias circuit is divided into multiple functional blocks: a first bias circuit generating a first bias current, a second bias circuit generating a second bias current, and a summing node combining them. This segmentation allows independent optimization of each block to achieve overall insensitivity to process variations while maintaining linearity enhancement.
Solution Approach 2:
The patent uses current mirror circuits to copy and replicate bias currents throughout the amplifier stages. The first and second bias currents are mirrored to multiple transistors, ensuring consistent biasing across different process variations and reducing sensitivity to individual transistor parameter spreads.
2Reliability
If multiple bias circuits are used to reduce sensitivity to process spread, then the robustness of bias current is improved, but the device complexity increases
Solution Approach 1:
The bias circuits are designed to serve multiple functions simultaneously: generating bias currents, providing linearity enhancement, and compensating for process variations. The same circuit blocks that generate bias currents also provide the necessary compensation, reducing the need for separate dedicated compensation circuits.
Solution Approach 2:
The patent combines the bias generation and linearity enhancement functions into integrated circuit blocks rather than using separate dedicated circuits. The first and second bias circuits are merged with the amplifier stages they bias, reducing overall device complexity while maintaining robustness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed bias circuit enhances the robustness of bias current against process spread and supply voltage variations, improving amplifier linearity and modulation bandwidth while maintaining AM to AM and AM to PM characteristics.
Implementation Method 1
a variable capacitor coupled between the second transistor control terminal and a ground
Implementation Method 2
a first resistor coupled between a first transistor control terminal and a second transistor control terminal
Implementation Method 3
a first transistor and a second transistor configured as a first current mirror
Data Source
AI summary
A bias circuit for a RF amplifier is described. The bias circuit includes a first transistor and a second transistor configured as a first current mirror. A first current source is arranged between a supply node and the first transistor first terminal. An output of the bias circuit is coupled to the second transistor second terminal. A second current mirror coupled to the first current mirror and the bias circuit output. The bias circuit includes a first resistor coupled between a first transistor control terminal and a second transistor control terminal and a variable capacitor coupled between the second transistor control terminal and a ground.