RF Bias Linearization Transistors for Wide-Bandwidth Power Amplifiers
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Solution Overview
Problem
Conventional adaptive and linearization biasing techniques for power amplifiers in RF systems are sensitive to process, voltage, and temperature variations, have limited envelope bandwidth, and are not suitable for amplifiers using stacked transistors, particularly in modern communication systems like 5G.
Innovation Solution
The proposed solution involves a bias arrangement with separate bias and linearization circuits coupled by a coupling circuit, where linearization transistors sense RF signals and provide modified bias signals at different terminals, reducing sensitivity to PVT variations and improving envelope bandwidth, and suitability for amplifiers with stacked transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional adaptive biasing techniques are used, then bias control is achieved, but sensitivity to process, voltage, and temperature variations increases
Solution Approach 1:
The patent introduces linearization transistors as intermediary elements that sense the RF signal and generate compensation signals to offset PVT variations. These transistors act as mediators between the RF signal and the bias circuitry, providing adaptive compensation that reduces sensitivity to process, voltage, and temperature changes without requiring direct modification of the conventional biasing approach.
Solution Approach 2:
The patent implements feedback mechanisms where the linearization transistors continuously monitor the RF signal characteristics and adjust the bias signals accordingly. This feedback loop enables the system to automatically compensate for PVT variations by detecting changes in the RF signal and modifying the bias to maintain optimal amplifier performance across varying conditions.
2Reliability
If conventional linearization biasing is used, then linearity improvement is achieved, but envelope bandwidth is limited
Solution Approach 1:
The patent segments the biasing function into separate conventional biasing and linearization components. By dividing the bias network into distinct functional blocks with separate linearization transistors for each amplifier terminal, the system achieves linearity improvement without the bandwidth limitations of integrated conventional linearization approaches. Each segment operates independently to maintain wide envelope bandwidth.
Solution Approach 2:
The patent extends the biasing approach into a new dimensional configuration by adding separate linearization transistors connected to different terminals of the amplifier. This spatial dimensionality change allows simultaneous achievement of linearity and wide bandwidth, as each terminal receives optimized biasing independent of the others, avoiding the bandwidth constraints of single-loop conventional linearization.
3Power
If stacked transistors are used in amplifiers, then power density is improved, but conventional biasing techniques become unsuitable
Solution Approach 1:
The patent applies local quality by introducing specific linearization transistors tailored for stacked transistor configurations. Each transistor in the stack receives customized biasing through dedicated linearization elements, allowing the biasing scheme to adapt to the unique electrical characteristics of stacked transistor arrangements while maintaining high power density benefits.
Solution Approach 2:
The patent modifies biasing parameters dynamically to accommodate stacked transistor configurations. By adjusting bias voltages and currents through the linearization transistors based on the specific stack configuration, the system maintains compatibility with various stacked transistor arrangements while preserving the high power density advantage of the stacked topology.
Data Source
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AI summary
Bias arrangements for amplifiers are disclosed. An example arrangement includes a bias circuit, configured to produce a bias signal for the amplifier, and a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal based on an RF signal indicative of an RF input signal to be amplified by the amplifier. The linearization circuit includes a bias signal input for receiving the bias signal, an RF signal input for receiving the RF signal, and an output for providing a modified bias signal. The linearization circuit further includes at least a first linearization transistor, having a first terminal, a second terminal, and a third terminal, where each of the bias signal input and the RF signal input of the linearization circuit is coupled to the first terminal of the first linearization transistor, and the output of the linearization circuit is coupled to the third terminal of the first linearization transistor.