Cascode RF Power Amplifier Floating Bulk Bias for Low-Voltage Linearity
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Solution Overview
Problem
Low-voltage MOS cascode radio frequency power amplifiers suffer from limited gain, linearity, and power-added efficiency due to low drain-to-source voltage, particularly when using low-voltage power sources like batteries, necessitating complex or large circuit solutions.
Innovation Solution
Implementing a cascode arrangement with a common gate transistor bulk connected to a resistor receiving a voltage greater than or equal to the source voltage, creating a floating point and allowing a zero or negative source-to-bulk voltage, thereby reducing the threshold voltage and increasing the drain-to-source voltage of the common source transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a low-voltage power source is used to limit power consumption, then power consumption is reduced, but the drain-to-source voltage of the common source transistor decreases, leading to reduced gain, linearity, and power-added efficiency
Solution Approach 1:
The patent changes the voltage parameter at the bulk terminal of the common gate transistor by connecting it to a resistor that receives a voltage greater than or equal to the source voltage. This creates a negative source-to-bulk voltage, which modifies the threshold voltage characteristics and allows the common source transistor to achieve higher drain-to-source voltage even with a low-voltage power source, thereby maintaining gain, linearity, and power-added efficiency while keeping power consumption low.
2Reliability
If a bootstrap circuit is used to increase the gate voltage of the common gate transistor to improve drain-to-source voltage, then the drain-to-source voltage increases, but the circuit complexity and size increase
Solution Approach 1:
The patent extracts the essential function of voltage boosting from a complex bootstrap circuit and implements it through a simple resistor connection to the bulk terminal. By removing the need for complex active circuits and using only a passive resistor element, the solution achieves the same voltage enhancement effect with minimal added complexity and area.
Solution Approach 2:
The patent replaces a complex, expensive bootstrap circuit with a simple, inexpensive resistor. This resistor-based solution provides the necessary voltage enhancement function at a fraction of the complexity and cost, making it suitable for integrated circuit implementations where area and component count are critical constraints.
3Reliability
If the size of the common gate transistor is increased to improve performance, then the drain-to-source voltage of the common source transistor increases, but the overall transistor size increases
Solution Approach 1:
Instead of increasing the physical size of the common gate transistor, the patent changes the electrical parameters by applying a negative source-to-bulk voltage. This parameter change effectively enhances the voltage headroom without requiring larger transistor dimensions, thereby maintaining compact device area while achieving improved drain-to-source voltage and overall performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the gain, linearity, and power-added efficiency of the radio frequency power amplifier while maintaining a compact size, suitable for low-voltage applications.
Implementation Method 1
Applying a voltage that is greater than or equal to the source voltage of the at least one gate transistor allows a zero or negative source-to-bulk voltage to be imposed on the at least one common gate transistor. This allows a threshold voltage of the at least one common gate transistor to be decreased
Data Source
AI summary
According to an embodiment, An integrated circuit comprising a first cascode radio frequency (RF) power amplifier that includes a first common source transistor having a gate configured to receive a first RF signal, and a source connected to a neutral point; a first common gate transistor having a gate and a drain connected to a power source node, and a source connected to a drain of the first common source transistor; and a first resistor coupled between a bulk of the first common gate transistor and a first bulk bias node configured to provide a voltage that is greater than or equal to a voltage at the source of the first common gate transistor, wherein the first resistor is configured to obtain a floating point.