RF Integrated Circuit Phase Noise Test via Frequency Division
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Solution Overview
Problem
Current automatic testing methods for on-chip RF oscillators in RF chips are inefficient, limited by high noise floors that affect radar sensor sensitivity and accuracy, and require expensive equipment that can only test a small number of chips simultaneously.
Innovation Solution
An integrated circuit with a voltage-controlled oscillator (VCO) and a frequency divider that generates a frequency-divided local oscillator signal, combined with a mixer that uses an external reference oscillator signal for down-conversion, allowing for efficient testing of phase noise properties within the RF chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional automatic testing methods are used for on-chip RF oscillators, then phase noise properties can be characterized, but the testing duration is long and only a small number of chips can be tested in parallel
Solution Approach 1:
The testing system is segmented into multiple parallel test channels, each capable of independently testing one RF chip. The test structure is divided into functional modules including reference oscillators, mixers, frequency dividers, and phase noise measurement units distributed across multiple test points, enabling simultaneous parallel testing of multiple chips without interference
Solution Approach 2:
A frequency divider is introduced as an intermediary component between the VCO and the mixer to reduce the frequency of the local oscillator signal. This frequency reduction enables the use of lower-frequency reference oscillators and simplifies the mixing process, allowing for more efficient parallel testing configurations
2Measurement precision
If the noise floor is high in radar systems, then the overall sensitivity is limited, but the phase noise properties of on-chip oscillators cannot be effectively tested
Solution Approach 1:
The phase noise measurement function is extracted from the main radar signal path and implemented as a separate test mode. The test structure includes dedicated test pads, mixers, and phase noise measurement units that can operate independently from the radar's main processing chain, allowing phase noise characterization without being affected by the radar's operational noise floor
Solution Approach 2:
A copy of the local oscillator signal is created through the frequency divider and mixer test path, allowing the phase noise properties to be measured separately from the actual radar operation. The test system creates a parallel measurement path that replicates the LO signal processing but directs it to measurement equipment rather than the radar's signal processing chain
3Measurement precision
If expensive test equipment is used to test RF oscillators, then phase noise properties can be accurately characterized, but the equipment can only test a small number of chips simultaneously
Solution Approach 1:
The test system is segmented into multiple identical or modular test units that can operate in parallel. Each test unit includes its own reference oscillator, mixer, frequency divider, and phase noise measurement capability, allowing simultaneous testing of multiple chips with high precision equipment distributed across different test points
Solution Approach 2:
The test structure is designed with universal components that can serve multiple functions and test multiple chips. The frequency divider and mixer configurations can be reused across different test points, and the phase noise measurement units can be shared or replicated to accommodate parallel testing of multiple RF chips with the same precision requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables faster and more parallel testing of RF chips, improving the sensitivity and accuracy of radar sensors by reducing the noise floor and increasing production efficiency.
Implementation Method 1
a voltage-controlled oscillator (VCO) that generates a local oscillator signal
Implementation Method 2
a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor
Implementation Method 3
a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal
Data Source
AI summary
An integrated circuit is described herein. According to one or more embodiments, the integrated circuit includes a local oscillator with a voltage-controlled oscillator (VCO) that generates a local oscillator signal. Further, the integrated circuit includes a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor. A first test pad of the integrated circuit is configured to receive a reference oscillator signal. Further, the integrated circuit includes a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal.