RF Clock Generation with Synchronized ALC for Pulse Power Stability

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Solution Overview

Problem

Existing RF generators face challenges in maintaining stable output power levels due to temperature variations and power supply drifts, requiring complex amplitude level control loops that are inefficient for pulse-modulated RF signals.

Innovation Solution

The implementation of an automatic level control (ALC) circuit with synchronized ADC sampling and gated accumulation in RF generators, enabling fast control loops for pulse-modulated RF signals, and supporting multi-level control through synchronized ADC sampling and indexed digital sample processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex amplitude level control loops are implemented to maintain stable output power levels, then output power stability is improved, but device complexity increases

Engineering Contradiction:
Improveoutput power stabilityVSAvoidcontrol loop complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces traditional continuous analog amplitude level control loops with a digital control system using synchronized ADC sampling and gated accumulation. This substitution of mechanical/analog systems with digital electronics simplifies the control loop architecture while maintaining output power stability through software-based processing of sampled RF signal levels.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements periodic sampling of the RF signal using synchronized ADC sampling at specific intervals during pulse-modulated RF signals. This periodic action allows the system to capture representative signal levels at controlled moments, enabling stable output power maintenance through discrete measurements rather than continuous complex control loops.

Inventive Principle:
Principle #19Periodic action

2Measurement precision

If traditional sampling methods are used for RF signal level detection, then measurement coverage is improved, but sampling efficiency deteriorates for pulse-modulated signals

Engineering Contradiction:
Improvesignal level measurementVSAvoidcontrol loop speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies gated accumulation that selectively accumulates ADC samples only during the pulse-on period of pulse-modulated RF signals. This preliminary filtering action before full processing ensures that only relevant signal portions are measured, improving both measurement precision for pulse-modulated signals and control loop speed by avoiding processing of irrelevant zero-signal periods.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If high-resolution ADC sampling is implemented for accurate RF signal measurement, then measurement precision is improved, but ADC cost increases

Engineering Contradiction:
ImproveRF signal measurement accuracyVSAvoidADC system cost
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses gated accumulation to selectively process only the necessary portion of ADC samples corresponding to the pulse-on period. This partial processing approach maintains measurement precision by focusing computational resources on relevant signal portions while reducing the overall sampling rate requirements, thereby lowering ADC cost without sacrificing measurement accuracy for pulse-modulated RF signals.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12557044B2Clock generation circuit in a radio frequency system
Publication Date: 2026.02.17 XP POWER
  • US12557044B2 patent drawing
  • US12557044B2 patent drawing
  • US12557044B2 patent drawing

AI summary

A radio frequency (RF) generator incorporates an automatic level control (ALC) circuit to control the output level of the RF signal where the ALC circuit implements synchronized ADC sampling, pulse sample indexing, gated accumulation to enable fast ALC loop control, especially for pulse-modulated RF signals. In other embodiments, the ALC circuit implements multi-level control for multi-level RF signals. In this manner, the RF generator uses the ALC circuit to generate an RF signal having a constant power level for RF signals having any pulse shape or output levels. In other embodiments, a clock generation circuit in an impedance matching network synchronizes a slave clock to a clock signal of the RF signal when the load impedance is resistive only or when the clock signal of the RF signal has a given phase condition.