RF Clock Generator Duty Cycle Correction Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing radio frequency identification tags face challenges in maintaining clock accuracy in low power environments due to varying received radio frequency energy levels, which can lead to reduced effectiveness and accuracy.
Innovation Solution
The implementation of a radio frequency device with a duty cycle correction circuit and a dynamic bias circuit that adjusts the charge pump's output to reduce asymmetry and improve clock accuracy, using a current steering topology and charge pump to generate a second clock with a positive going edge for each edge of the first clock, and a capacitor to stabilize the duty cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the clock rate is reduced to lower power requirements, then power consumption is reduced, but clock accuracy deteriorates
Solution Approach 1:
The patent implements a dynamic bias circuit that adjusts the charge pump current based on the received RF power level. When RF power is high, the bias circuit increases the charge pump current to maintain accurate clock generation. When RF power is low, it reduces the current to minimize power consumption. This dynamic adjustment allows the system to optimize between power consumption and clock accuracy based on operating conditions.
Solution Approach 2:
The patent changes the operating parameters of the charge pump circuit based on received RF power levels. By adjusting the bias current and charge pump switching characteristics dynamically, the system maintains optimal clock accuracy across varying power conditions while minimizing power consumption when possible.
2Power
If the received radio frequency energy is low, then power availability is reduced, but clock accuracy deteriorates due to insufficient power for accurate timing
Solution Approach 1:
The patent employs a feedback mechanism where the dynamic bias circuit continuously monitors the received RF power level and adjusts the charge pump current accordingly. This feedback loop ensures that the clock generation circuit receives sufficient current to maintain accuracy even when operating on low RF power, preventing the deterioration of clock timing precision.
Solution Approach 2:
The system uses its own received RF power to dynamically control its internal bias conditions. The dynamic bias circuit automatically adjusts operating parameters based on available power without external intervention, enabling the clock generator to self-optimize its performance for the current power environment.
3Power
If excess voltage is dissipated through a resistor to compensate for voltage differences, then voltage regulation is achieved, but power consumption increases
Solution Approach 1:
The patent replaces the passive resistive voltage dissipation mechanism with an active electronic control system. Instead of using resistors to burn off excess voltage, the dynamic bias circuit actively manages power distribution by controlling the charge pump current based on received RF power levels, significantly reducing wasted power while maintaining voltage regulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances clock accuracy by maintaining a corrected duty cycle greater than 44% near a power source at -3 dBm and greater than 49% at 19 dBm, reducing error sources and improving sampling precision while minimizing power consumption.
Implementation Method 1
a radio frequency energy receiver that is operable to receive a radio frequency energy and to convert the radio frequency energy to a DC current
Data Source
AI summary
Various systems and methods for low power identification are described herein. For example, a radio frequency device including a radio frequency energy receiver. The radio frequency energy receiver is operable to receive a radio frequency energy and to convert the radio frequency energy to a DC current. In addition, the device further includes a first clock generator that generates a first clock at a first frequency and second clock generator that generates another clock based on the first clock. The first clock generator includes a duty cycle correction circuit. The second clock has a positive going clock edge for each edge of the first clock.