High Resistivity Layer Fabrication for RF CMOS Substrate Removal
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Solution Overview
Problem
Residual low resistivity paths from initial substrates in RF CMOS devices lead to RF losses and reduced performance due to incomplete removal during double layer transfer processes.
Innovation Solution
A method involving the formation of a high resistivity layer by thinning the initial substrate, creating vias, and attaching a final high resistivity substrate to eliminate low resistivity paths, thereby enhancing RF performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If double layer transfer process is used to replace initial substrate with final substrate, then RF performance can be improved, but residual low resistivity paths may remain causing RF losses
Solution Approach 1:
The patent extracts and removes the harmful residual low resistivity substrate material between devices through selective etching processes. The method involves forming vias to access and remove the residual substrate material that would otherwise create unwanted conductive paths, thereby eliminating the harmful factor while preserving the beneficial device structure.
Solution Approach 2:
The patent applies local quality by creating high resistivity regions specifically between devices while maintaining the original substrate elsewhere. Through selective epitaxial growth or implantation, the method modifies the electrical properties of specific regions to create high resistivity barriers between adjacent devices, ensuring that only the necessary areas are altered to prevent RF losses.
2Object-generated harmful factors
If residual thickness of initial substrate is removed completely, then low resistivity paths are eliminated, but manufacturing complexity increases
Solution Approach 1:
The patent segments the substrate removal process into controlled stages through via formation and selective etching. Rather than attempting to remove the entire substrate at once, the method divides the process into discrete steps: forming isolation structures, creating vias, and selectively removing residual substrate in controlled regions, thereby managing complexity through process segmentation.
Solution Approach 2:
The patent performs preliminary actions by forming via structures and isolation regions before completing the substrate removal. These preliminary structures serve as guides and barriers that control the subsequent etching process, ensuring that residual substrate is removed only where needed while preventing damage to devices and simplifying the overall manufacturing sequence.
Data Source
Figure 1A~1B
Figure 1C~1D
Figure 1E~1F
AI summary
Methods of forming a semiconductor structure (140) include forming a device layer (100) on an initial substrate (102), attaching a first surface of the device layer (100) to a temporary substrate and forming a high resistivity layer (136) on a second surface of the device layer (100) by removing a portion of the initial substrate (102). Methods further include attaching a final substrate (132) to the high resistivity layer (136) and removing the temporary substrate. Semiconductor structures (140) are fabricated by such methods that include a final substrate (132), a high resistivity layer (136) disposed over the final substrate (132) and a device layer (100) disposed over the high resistivity layer (136).