RF DAC Dynamic I/Q Assignment for Phase-Preserving Clipping

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Solution Overview

Problem

Conventional RF digital transmitters and power amplifiers with static I and Q assignments suffer from limited output power due to separate clipping of in-phase (I) and quadrature (Q) signal magnitudes, which restricts transmission range and introduces phase distortion.

Innovation Solution

A dynamic assignment scheme with phase-preserving clipping technique, where I and Q magnitudes are scaled equally and clipped together, allowing each RF cell to transmit either I or Q signals based on the summation of I and Q samples, thereby increasing output power and maintaining signal phase integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If separate clipping of I and Q signal magnitudes is applied, then device complexity is reduced, but output power is limited and phase distortion occurs

Engineering Contradiction:
Improveclipping mechanism complexityVSAvoidoutput power
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The patent merges the separate clipping operations for I and Q signals into a unified clipping mechanism that processes both signals simultaneously. The clipping function applies a common threshold to the combined I and Q magnitudes, allowing the system to achieve higher output power (approximately 3dB higher) without requiring separate complex clipping circuits for each signal path.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces dynamic assignment of unary cells between I and Q channels based on real-time signal conditions. Instead of fixed static assignment, the system dynamically determines which unary cells are assigned to I or Q based on the instantaneous signal magnitudes, enabling adaptive optimization of output power while maintaining phase integrity.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If static I and Q assignment is used, then device complexity is reduced, but transmission range is restricted

Engineering Contradiction:
Improveassignment scheme complexityVSAvoidoutput power
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The patent transitions from static unary cell assignment to dynamic assignment where the allocation of unary cells between I and Q channels changes based on signal conditions. This dynamic reassignment enables the system to optimize power distribution in real-time, increasing output power by approximately 3dB and thereby extending transmission range without significantly increasing device complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the assignment parameter from fixed static allocation to dynamic allocation based on signal magnitude ratios. By adjusting the assignment parameters adaptively according to instantaneous I and Q signal levels, the system maximizes output power while maintaining signal integrity, directly addressing the limitation of static assignment schemes.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If separate clipping of I and Q magnitudes is applied, then manufacturing precision requirements are reduced, but phase distortion is introduced

Engineering Contradiction:
Improveclipping implementation precisionVSAvoidsignal phase integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent combines the clipping operations for I and Q signals into a single unified process that maintains the phase relationship between the two signals. By applying clipping to the combined signal representation rather than separately to I and Q, the system preserves phase integrity and reduces error vector magnitude (EVM) without requiring higher manufacturing precision in individual clipping circuits.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4447324A1Dynamic assignment with phase-preserving clipping technique for digital transmitters and power amplifiers
Publication Date: 2024.10.16 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • EP4447324A1 patent drawingFigure 1
  • EP4447324A1 patent drawingFigure 2A~2B
  • EP4447324A1 patent drawingFigure 3A~3B

AI summary

A transmitter includes a first digital-to-analog converter (DAC) circuit consisting of a first set of unary cells to mix a first set of digital input data with a first clock signal. A second DAC circuit includes a second set of unary cells to mix a second set of digital input data with a second clock signal. A third circuit provides signals to the first DAC circuit and the second DAC circuit to implement an assignment scheme to assign either an in-phase (I) component or a quadrature (Q) component to the first set of unary cells and the second set of unary cells. Based on the assignment scheme, the first set of digital input data include I-data and Q-data, and the second set of digital input data include I-data and Q-data.