RF DAC Sign Selection Timing for Clean I/Q Polarity Switching
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Solution Overview
Problem
Misalignment of the sign selection signal with the rising or falling edge of in-phase (I) or quadrature (Q) signals in radio frequency communications leads to signal distortion, resulting in noise and reduced power output and sensitivity in wireless transmissions.
Innovation Solution
The implementation of sign selection adjusting circuitry that generates adjusted sign selection signals for each quadrature signal, allowing for precise timing adjustments to prevent signal pulse errors, thereby improving the quality of the transmission signal without increasing the size of the electronic device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single sign selection signal is used to select polarity of I/Q signals, then device complexity is reduced, but signal distortion occurs due to misalignment with rising or falling edges of I or Q signals
Solution Approach 1:
The patent divides the single sign selection signal into separate sign selection signals for each quadrature signal (I and Q). This segmentation allows independent timing control for each signal path, enabling precise alignment with the rising or falling edges of individual I or Q signals without increasing overall system complexity
Solution Approach 2:
The patent generates sign selection signals in advance based on predicted transitions of I and Q signals. By determining the timing of polarity changes before the actual signal transitions occur, the system can prepare and apply the correct polarity at the precise moment needed, preventing misalignment and signal distortion
2Reliability
If sign selection signal timing is adjusted to prevent misalignment, then signal quality improves, but device complexity increases
Solution Approach 1:
The patent introduces an intermediary circuit that generates sign selection signals based on the quadrature signals themselves. This intermediary uses the existing I and Q signal transitions as triggers to automatically generate appropriately timed sign selection signals, eliminating the need for complex external timing adjustment circuitry while maintaining signal quality
Solution Approach 2:
The system uses the quadrature signals to generate their own sign selection signals. The I and Q signals serve dual purposes: they carry the information signal and simultaneously trigger the polarity selection. This self-service approach eliminates the need for separate complex timing control circuits while ensuring precise alignment
3Object-affected harmful factors
If precise timing alignment is achieved, then noise is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent combines the sign selection function with the quadrature signal generation function. The same circuitry that generates I and Q signals also generates the sign selection signals from these same signals. This merging eliminates the need for separate noise-prone sign selection circuits while achieving precise timing alignment, thereby reducing noise without increasing manufacturing complexity
Data Source
AI summary
Embodiments disclosed herein relate to improving a power output of a transmitter of an electronic device. To do so, the transmitter may include signal selection circuitry to adjust a sign selection signal to accurately transition between polarities of a quadrature (e.g., I or Q) component signal stored in or for which an indication is stored in a storage cell of a radio frequency digital-to-analog converter. The sign selection signal may generate a separate adjusted sign selection signal for each polarity of each quadrature component signal such that a transition of the selection signal between a first value and a second value (e.g., logic high and low) occurs when the respective quadrature (e.g., +/â and I/Q component signal is a logic low. In this way, the signal selection circuitry reduces an error pulse in the output of the transmitter.