Cross-Coupled RF-DC Converter Using N-Well CMOS Rectification
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Solution Overview
Problem
Conventional RF-DC converters using CMOS technology suffer from inefficiency, complexity, and high manufacturing costs due to the use of twin-well processes and lack of body biasing in transistor configurations, leading to increased space consumption and maintenance costs.
Innovation Solution
A RF-DC converter design utilizing a first and second cross-coupled circuit with NMOS and PMOS transistors fabricated using an n-well process, featuring a compact configuration and reduced manufacturing costs, with the second stage comprising only PMOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If twin-well CMOS process is used for fabricating RF-DC converter, then transistor performance and reliability are improved, but manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates the p-well fabrication step from the conventional twin-well CMOS process, retaining only the n-well process. This is achieved by using depletion-mode PMOS transistors that can be fabricated using only n-well technology, thereby removing the complex and costly p-well formation steps while maintaining transistor functionality
Solution Approach 2:
The patent adopts a simpler n-well CMOS process that is cheaper and more widely available than twin-well process, sacrificing the marginal performance benefits of p-well transistors in exchange for significantly reduced manufacturing costs and easier fabrication
2Reliability
If conventional CMOS rectifier configuration is used, then rectification function is achieved, but chip area consumption increases
Solution Approach 1:
The patent merges the body terminals of multiple PMOS transistors into a single common body terminal connected to ground. This consolidation eliminates the need for separate body terminals for each transistor, significantly reducing the chip area required for the rectifier structure while maintaining proper rectification function
Solution Approach 2:
The single common body terminal serves all PMOS transistors in the rectifier, making it a multi-functional element that performs the body biasing function for multiple devices simultaneously, thereby reducing overall component count and chip area
3Reliability
If conventional CMOS rectifier configuration is used, then rectification function is achieved, but parasitic capacitance increases
Solution Approach 1:
By merging the body terminals into a single common terminal, the patent reduces the total parasitic capacitance associated with multiple separate body terminals. The consolidated structure minimizes the overlapping gate-to-body and drain-to-body capacitances that would otherwise accumulate across multiple discrete transistor bodies
4Manufacturing precision
If twin-well process is used, then precise control over electrical properties is achieved, but device complexity increases
Solution Approach 1:
The patent removes the p-well fabrication steps from the manufacturing process, extracting only the essential n-well process steps needed to achieve functional transistors. This simplification reduces process complexity and manufacturing steps while maintaining adequate control over electrical properties for energy harvesting applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves efficient RF signal rectification with reduced chip size, lower parasitic capacitance, and lower production costs while maintaining high operating speed and stability.
Implementation Method 1
Each of the first NMOS transistor, the second NMOS transistor, the first PMOS transistor, and the second PMOS transistor are fabricated on a substrate by an n-well process
Implementation Method 2
Rectification is a process of converting radio frequency (RF) signals into direct current (DC)
Data Source
AI summary
A radio frequency to direct current (RF-DC) converter for energy harvesting includes a first cross-coupled circuit and a second cross-coupled circuit. The first cross-coupled circuit includes a pair of NMOS transistors and a pair of PMOS transistors. The second cross-coupled circuit is connected to an output of the first cross-coupled circuit and includes four cross-coupled PMOS transistors. Each of the NMOS transistors and PMOS transistors are fabricated on a substrate using n-well process. An RF voltage source is connected to the RF-DC converter to which an antenna and balun device are connected. An output circuit is connected the second cross-coupled circuit. Multiple stages identical to the second cross-coupled circuit including only PMOS transistors may be added between the output of the second cross-coupled circuit and the output circuit for greater amplification of the harvested energy.