RF Device Mold Structure for Thermal and Electrical Performance
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Solution Overview
Problem
Conventional silicon substrates used in RF device fabrication suffer from harmonic distortion and low resistivity, leading to limitations in achieving high linearity and heat dissipation, especially with increased transistor density and operation speed.
Innovation Solution
A radio frequency (RF) device with a mold device die and multilayer redistribution structure, featuring a thermally conductive film with high thermal conductivity and electrical resistivity, and a passivation layer, along with a specific packaging process that includes a first and second mold compound, to enhance thermal and electrical performance without increasing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional silicon substrates are used for RF device fabrication, then manufacturing cost is reduced and production capacity is increased, but harmonic distortion increases and electrical resistivity decreases
Solution Approach 1:
The patent removes the silicon substrate entirely from the RF device structure, extracting the source of harmonic distortion. The RF device is fabricated on an organic substrate with the active layer directly formed on the substrate surface, eliminating the silicon substrate's harmful electrical characteristics while preserving manufacturing efficiency through wafer-level processing.
Solution Approach 2:
The patent employs a composite structure combining organic substrate materials with semiconductor active layers. This composite approach replaces conventional silicon-based structures with an organic-inorganic hybrid architecture that achieves both low harmonic distortion and high electrical resistivity while maintaining compatibility with standard semiconductor fabrication processes.
2Productivity
If transistor density and operation speed are increased in RF devices, then device performance is improved, but heat generation increases significantly
Solution Approach 1:
The patent fundamentally changes the thermal conductivity parameter of the substrate material by transitioning from silicon (high thermal conductivity) to organic materials (low thermal conductivity). This parameter change enables superior heat dissipation at the wafer level, allowing high-density transistor integration and high-speed operation without excessive heat accumulation, while the low thermal conductivity of the organic substrate provides inherent thermal management.
Solution Approach 2:
The patent replaces the conventional silicon mechanical/thermal system with an organic substrate-based system that inherently provides better thermal management for high-density integrated circuits. The organic substrate's molecular structure naturally facilitates heat dissipation pathways that are more effective for high-performance RF devices with increased transistor density.
3Productivity
If wafer-level fan-out and embedded wafer-level ball grid array technologies are used, then I/O port density is increased without increasing package size, but device complexity increases
Solution Approach 1:
The patent performs I/O port formation and electrical interconnections at the wafer level before final device packaging, using preliminary redistribution layers and contact structures. This preliminary action enables high I/O density through wafer-level fan-out technology while simplifying the final packaging process, as the complex interconnections are already established during wafer fabrication rather than requiring post-packaging assembly.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces harmonic distortion, improves heat dissipation, and maintains high performance without size increase, addressing the limitations of conventional silicon substrates.
Implementation Method 1
a thermally conductive film, which has a thermal conductivity greater than 10 W/m·K and an electrical resistivity greater than 1E5 Ohm-cm, resides over the passivation layer
Implementation Method 2
The passivation layer extends over an entire backside of the device region, such that the passivation layer continuously resides over exposed surfaces within the opening and top surfaces of the isolation sections
Data Source
AI summary
The present disclosure relates to a radio frequency (RF) device and a process for making the same. According to the process, a precursor wafer, which includes device regions, individual interfacial layers, individual p-type doped layers, and a silicon handle substrate, is firstly provided. Each individual interfacial layer is over an active layer of a corresponding device region, each individual p-type doped layer is over a corresponding individual interfacial layer, and the silicon handle substrate is over each individual p-type doped layer. Herein, each individual interfacial layer is formed of SiGe, and each individual p-type doped layer is a silicon layer doped with a p-type material that has a doped concentration greater than 1E18cm-3. Next, the silicon handle substrate is completely removed to provide an etched wafer, and each individual p-type doped layer is completely removed from the etched wafer.