RF Circuit Digital Processing Integration Time Domain Isolation
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Solution Overview
Problem
High performance wireless communication apparatus face interference issues due to the separation of RF front-end and digital processing circuitry, leading to increased component count, size, and cost, as well as potential reliability and manufacturing failures.
Innovation Solution
Integration of RF front-end and digital processing circuitry on a single integrated circuit die using time domain isolation (TDI) techniques, where the digital processing circuit is shut down during RF active modes to reduce noise and spurious emissions, and a serial communications device with flow control logic is used to manage data streams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If RF front-end and digital processing circuitry are separated onto different integrated circuit dies, then noise and interference from digital circuitry to RF circuitry is reduced, but component count, size, and cost increase
Solution Approach 1:
The patent merges the RF front-end circuitry and digital processing circuitry onto a single integrated circuit die, eliminating the need for separate dies and reducing component count. The digital processing circuitry is integrated directly with the RF circuitry, allowing for a more compact and cost-effective design while managing noise through careful layout and timing control.
Solution Approach 2:
The patent extracts the harmful digital signals from the RF processing path by implementing time-domain isolation. Digital processing operations are scheduled to occur during periods when the RF front-end is inactive, effectively removing digital noise interference from the RF signal path without requiring physical separation onto different dies.
2Object-affected harmful factors
If RF front-end and digital processing circuitry are separated onto different integrated circuit dies, then noise and interference from digital circuitry to RF circuitry is reduced, but manufacturing reliability decreases
Solution Approach 1:
The patent combines both RF front-end and digital processing circuitry onto a single integrated circuit die, which simplifies the manufacturing process and improves reliability by eliminating inter-die connections and assembly steps. The monolithic integration ensures consistent electrical characteristics and reduces potential failure points associated with packaging and bonding multiple dies together.
3Productivity
If digital processing circuitry operates at full speed with fast transitions, then processing performance is improved, but spurious emissions that interfere with RF front-end increase
Solution Approach 1:
The patent implements periodic action by scheduling digital processing operations to occur in time slots when the RF front-end is not actively processing signals. Digital processing is activated during RF idle periods and deactivated during RF active periods, creating a periodic operation pattern that maintains high processing performance while eliminating spurious emissions during RF operation.
Solution Approach 2:
The patent applies dynamics by making the operational state of the digital processing circuitry variable rather than static. The digital processing circuitry dynamically changes its operational status based on the RF front-end state, switching between active and inactive modes to optimize both processing performance and noise reduction as conditions require.
Data Source
AI summary
A communication apparatus including a digital processing circuit coupled to a radio frequency (RF) circuit and to a serial communications device. The serial communications device may be configured to buffer data communicated between the digital processing circuit and an external device. A portion of the serial communications device may be disabled during an active mode of operation of the RF circuit. The serial communications device may include a flow control logic circuit configured to control a data stream between the digital processing circuit and the external device while a portion of the serial communications device is disabled. In some embodiments, a portion of the digital processing circuit may be disabled during an active mode of operation of the RF circuit.


