RF Doubler Circuit With DC-Balanced Differential Outputs

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Solution Overview

Problem

Existing radiofrequency doublers and triplers face challenges in efficiently doubling or tripling high-frequency signals, often requiring complex configurations, such as polyphase filters and Phase Locked Loops, which introduce losses and are difficult to implement at high frequencies.

Innovation Solution

A radiofrequency doubler and tripler circuit design featuring transistors connected in parallel with a current source and a feedback loop to equalize DC components, using operational amplifiers and capacitors to control voltages, allowing for balanced differential outputs without the need for complex phase locking or polyphase filters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If polyphase filters and Phase Locked Loops are used to double or triple radiofrequency signals, then frequency multiplication is achieved, but the system complexity increases and losses are introduced

Engineering Contradiction:
Improvefrequency multiplication capabilityVSAvoidcircuit configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the complex polyphase filters and Phase Locked Loops from the frequency multiplication circuit, replacing them with a simplified transistor-based architecture that achieves the same frequency doubling or tripling function without the associated complexity and losses

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical/complex control systems (Phase Locked Loops) with a simpler electronic transistor switching mechanism that achieves frequency multiplication through controlled signal switching and combining, eliminating the need for complex feedback control circuits

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If polyphase filters and Phase Locked Loops are used for frequency multiplication, then frequency doubling or tripling is achieved, but significant losses are introduced

Engineering Contradiction:
Improvefrequency multiplication capabilityVSAvoidsignal losses
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent uses simple transistor switching elements that can operate at high frequencies without the signal losses associated with polyphase filters, achieving efficient frequency multiplication through direct transistor control rather than filter-based approaches

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent employs periodic switching of transistors synchronized with the input radiofrequency signal to achieve frequency multiplication, using timed switching actions rather than continuous filter processing, which reduces energy losses

Inventive Principle:
Principle #19Periodic action

3Productivity

If complex phase locking and polyphase filters are implemented, then frequency multiplication is achieved, but implementation difficulty increases at high frequencies

Engineering Contradiction:
Improvefrequency multiplication capabilityVSAvoidimplementation ease at high frequencies
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent changes the operating parameters by using transistor switching frequencies and timing that are well-suited for high-frequency operation, avoiding the frequency limitations and implementation difficulties associated with polyphase filters and Phase Locked Loops at frequencies above 1 GHz

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12184289B2Radio frequency doubler
Publication Date: 2024.12.31 STMICROELECTRONICS FRANCE
  • US12184289B2 patent drawing
  • US12184289B2 patent drawing
  • US12184289B2 patent drawing

AI summary

In an embodiment a radiofrequency doubler includes a first transistor and a second transistor connected in parallel between a first differential output and a first terminal of a current source configured to provide a bias current, a second terminal of the current source being connected to a first supply potential, a third transistor connected between the first terminal of the current source and a second differential output, a circuit configured to apply an AC component of a first differential input and a first DC voltage to a gate of the first transistor, apply an AC component of a second differential input and the first DC voltage to a gate of the second transistor and apply a second DC voltage to a gate of the third transistor, and a feedback loop configured to control the first voltage or the second voltage from a difference between DC components of the first and second differential outputs so as to equalize the DC components.