Low Power RF Envelope Detector Using Periodic Charging
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Solution Overview
Problem
Conventional RF detectors in high-speed, battery-powered applications face high power dissipation due to high static current consumption, making them unsuitable for many applications with increasing data rates and communication couplers.
Innovation Solution
A low power RF power detector is designed using a charging transistor and input capacitors to couple and control the charge supplied to an output capacitor, employing diodes and NMOS transistors to efficiently detect RF signals with minimal quiescent current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional RF detectors are used in high-speed applications, then detection capability is achieved, but power consumption increases significantly
Solution Approach 1:
The patent implements periodic action by using clocked operation of the charging transistor and capacitive coupling to transfer charge in discrete periods. The detector operates in cycles where the charging transistor is periodically enabled to transfer charge from the input capacitor to the output capacitor only when RF signal energy is detected, rather than continuously consuming power. This periodic charge transfer mechanism enables the detector to achieve high-speed detection capability while minimizing average power consumption by keeping the charging path inactive during idle periods.
2Speed
If static current is increased to improve detection speed, then high-speed detection is achieved, but power dissipation increases
Solution Approach 1:
The patent applies dynamics by making the charging transistor's operation dynamic rather than static. The charging transistor is controlled by a clock signal that dynamically enables or disables the charge transfer path based on detection needs. During active detection phases, the transistor conducts with sufficient current for high-speed operation; during idle phases, the transistor is completely off, eliminating static current draw. This dynamic control allows the system to achieve high detection speed when needed while minimizing power dissipation during normal operation.
Solution Approach 2:
The patent utilizes parameter changes by varying the charging transistor's conductance state between fully off and fully on based on the detection requirements. The transistor's operating point is dynamically changed between cutoff region (low power) and saturation region (high speed detection). Additionally, the capacitive coupling parameters are optimized to enable rapid charge transfer during active phases, achieving high-speed detection without requiring continuously high current levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively detects RF signals with reduced power consumption, suitable for high-speed applications, extending battery life and improving system efficiency by minimizing power dissipation.
Implementation Method 1
A second input capacitor couples a first polarity of the input signal to a first diode such that the first diode is operable to couple charge to the first input capacitor and to the gate of the charging transistor in response to a positive excursion of the first polarity of the input signal. A third input capacitor couples the second polarity of the input signal to a second diode coupled in series with the first diode.
Data Source
AI summary
A low power radio frequency envelope detector includes a charging transistor for controlling the charge supplied to an output capacitor. A first input capacitor couples an input signal to a gate of the charging transistor. A second input capacitor couples a first polarity of the input signal to a first diode such that the first diode is operable to couple charge to the first input capacitor and to the gate of the charging transistor in response to a positive excursion of the first polarity of the input signal. A third input capacitor couples a second polarity of the input signal to a second diode coupled in series with the first diode. The first and second diodes are operable to couple charge to the first input capacitor and to the gate of the charging transistor in response to a positive excursion of the first polarity of the input signal.