Preformed RF Feed and Shield Structures for Low-Loss Semiconductor Packages
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Solution Overview
Problem
Existing semiconductor packages face challenges in integrating multiple semiconductor components efficiently, particularly in maintaining electrical connections and signal integrity due to the limitations of conventional via formation methods like photolithography and electroplating, which affect signal loss and structural integrity.
Innovation Solution
The use of preformed feeding and shielding elements, formed through molding, which are then integrated onto a substrate using surface mount technology, and encapsulated with a material that maintains their shape and reduces signal loss, along with a method of manufacturing that includes forming a RF structure on a substrate and molding the elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional via formation methods (photolithography and electroplating) are used to create feeding and shielding elements, then manufacturing complexity is reduced, but signal integrity deteriorates due to increased insertion and return losses
Solution Approach 1:
The patent replaces the conventional photolithography and electroplating process with a molding process to form feeding and shielding elements. This substitution eliminates the multi-step conventional manufacturing process while reducing signal losses, as the molding process creates elements with smoother surfaces and better geometric fidelity, directly improving signal integrity without increasing manufacturing complexity
Solution Approach 2:
The patent changes the manufacturing parameters from photolithography/electroplating to molding, which fundamentally alters how the feeding and shielding elements are formed. This parameter change results in elements with reduced surface roughness and improved dimensional accuracy, thereby reducing insertion and return losses while maintaining manufacturing efficiency
2Volume of moving object
If multiple semiconductor components are integrated into a single package to reduce package dimensions, then package size is reduced, but electrical connection reliability deteriorates
Solution Approach 1:
The patent forms the feeding and shielding elements as pre-formed structures using molding before integration into the package. This preliminary action ensures that the elements have optimized geometries and smooth surfaces from the outset, which maintains signal integrity and electrical connection reliability even as multiple components are integrated into a compact package structure
3Reliability
If preformed feeding and shielding elements are used with molding process, then signal integrity is improved by reducing insertion and return losses, but manufacturing precision requirements increase
Solution Approach 1:
The patent replaces photolithography and electroplating with a molding process that inherently provides better surface finish and geometric precision. The molding process creates elements with smoother surfaces and more accurate dimensions, which improves signal integrity while the process itself is well-suited for high-precision manufacturing, thereby not increasing manufacturing precision requirements
Data Source
AI summary
A semiconductor package includes a substrate, a preformed feeding element, a preformed shielding element, and an encapsulant. The preformed feeding element is disposed on the substrate and the preformed feeding element is disposed on the substrate and adjacent to the preformed feeding element. The encapsulant encapsulates the preformed feeding element and the preformed shielding element.