RF FET Switch Stack Bypass Path for Fast OFF Transition
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Solution Overview
Problem
FET switch stacks in RF circuits face challenges in achieving sufficient switching speed and avoiding voltage snapback when transitioning from the ON to the OFF state, due to the RC time constant imposed by drain-source resistors and gate capacitance, which conflicts with stringent design requirements.
Innovation Solution
Incorporating drain-source bypass switches that are turned on during the transition from the ON to the OFF state to bypass drain-source resistors, reducing the charging time constant and preventing snapback by maintaining the bypass switches in the ON state until the steady OFF state is reached.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If drain-source resistors are used in FET switch stacks, then linearity and insertion loss are improved, but switching speed deteriorates due to RC time constant
Solution Approach 1:
The circuit is segmented into multiple parallel paths: one path contains the drain-source resistor for normal operation, while another path contains the bypass switch for fast switching. This segmentation allows each path to be optimized for its specific function without compromising the other.
Solution Approach 2:
The bypass switch acts as an intermediary element that temporarily shorts the drain-source resistor during switching transitions. This intermediary component enables the circuit to overcome the RC time constant limitation by providing an alternative current path that bypasses the resistive constraint.
2Speed
If bypass switches are used to improve switching speed, then transition time is reduced, but voltage snapback occurs during transition
Solution Approach 1:
The bypass switch is activated before the main switch turns off, creating a cushioning effect that prevents voltage snapback. By preemptively engaging the bypass path, the circuit prepares for the transition and avoids the harmful voltage spike that would otherwise occur during the switching event.
Solution Approach 2:
The bypass switch is turned on in advance of the main switching event, performing a preliminary action that sets up the circuit for a clean transition. This preliminary engagement of the bypass path ensures that when the main switch transitions, the voltage snapback is prevented because the bypass provides a controlled discharge path for the gate capacitance.
3Loss of time
If bypass switches are turned off before steady state is reached, then switching window is shortened, but gate voltage snaps back to higher voltage
Solution Approach 1:
The circuit employs feedback control where the state of the bypass switch is determined by whether the FET has reached its steady state. The bypass switch remains engaged as long as the transition is in progress, and only disconnects once steady state is confirmed, ensuring reliable settling without premature disengagement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly improves the switching speed and eliminates voltage snapback, allowing the FET switch stack to reach the steady OFF state more quickly and reliably, meeting the stringent requirements of RF circuits.
Implementation Method 1
the RC time constant imposed by a combination of each drain-source resistor with corresponding device gate capacitor
Implementation Method 2
the combination of a larger gate resistor in combination with the transistor device gate capacitance will result in a slower transition
Data Source
AI summary
Methods and devices to improve the switching speed of radio frequency FET switch stacks are disclosed. The described methods and devices are based on bypassing drain-sources resistors when the FET switch stack is transitioning from an ON to an OFF state. Several implementations of the disclosed teachings are also presented.