Monolithic RF Filter Integration for Wider Bandwidth and Smaller Chips
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Solution Overview
Problem
RF front-end chips face challenges in minimizing size and reducing manufacturing costs due to the need for electrical connections between resonance devices and passive devices, which occupy more space and increase costs, especially with the rise of 5G requiring more RF front-end modules.
Innovation Solution
Integrating resonance devices, such as SAW or BAW devices, and passive devices, like IPDs, within a single die, with electrical connections via through holes to reduce space occupation and transmission losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If resonance devices and passive devices are electrically connected in separate dies, then manufacturing flexibility is improved, but space occupation increases and manufacturing cost increases
Solution Approach 1:
The patent merges the resonance device and passive device into a single integrated die structure. The passive device is formed on the substrate, and the resonance device is formed on the passive device, creating a compact integrated filter device that reduces space occupation while maintaining manufacturing flexibility through monolithic integration
2Adaptability or versatility
If resonance devices and passive devices are electrically connected in separate dies, then device independence is improved, but electrical transmission losses increase
Solution Approach 1:
The patent combines the resonance device and passive device in one die to minimize electrical transmission distance. The electrical connection is achieved through direct integration with minimal interconnection paths, significantly reducing electrical transmission losses compared to separate die configurations
3Adaptability or versatility
If more RF front-end modules are integrated for 5G, then functionality is improved, but chip size increases
Solution Approach 1:
The patent integrates multiple RF front-end modules including resonance devices and passive devices into a single compact die. This monolithic integration approach enables multiple functions to coexist in a reduced footprint, addressing the 5G requirement for enhanced functionality without proportionally increasing chip size
Solution Approach 2:
The patent utilizes vertical stacking where the resonance device is formed on top of the passive device, effectively using the third dimension (height) to pack more functionality into a smaller planar footprint, thereby reducing overall chip size while maintaining enhanced functionality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This integration broadens pass-band width, enhances out-of-band rejection, and reduces electrical transmission losses, thereby improving filter performance and reducing the size and cost of RF front-end chips.
Implementation Method 1
SAW resonators and BAW resonators have a high quality factor value (Q value) and are used to manufacture RF filters with a low insertion loss and a high-out-of-band rejection
Implementation Method 2
the restrictions of the electromechanical coupling coefficient of piezoelectric materials
Data Source
AI summary
A filter device, an RF front-end device and a wireless communication device are provided. The filter device includes a substrate, a passive device and at least one resonance device, wherein the passive device has a first side and a second side opposite to the first side, the substrate is located on the first side, and the at least one resonance device is located on the second side. The RF filter device formed by integrating the resonance device (such as an SAW or BAW resonance device) and the passive device (such as an IPD) can broaden the pass-band width, has a high out-of-band rejection, and occupies less space in an RF front-end chip.


