Radio Frequency Front-End Switching for Glitch-Free TDD-FDD Aggregation
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Solution Overview
Problem
Existing radio-frequency front end systems face challenges in efficiently supporting both Time-Division Duplexing (TDD) and Frequency-Division Duplexing (FDD) signals, particularly in maintaining low insertion loss and minimizing phase differences, which complicates the configuration and leads to signal quality issues like EVM glitches during switching operations.
Innovation Solution
The implementation of RF front end circuitry with multiple RF signal paths, switching circuitry, and timing control circuitry, utilizing thru and shunt switches with controlled timing delays to mitigate EVM glitches, allowing for efficient TDD-FDD carrier aggregation by alternating TDD signal paths and maintaining continuous FDD paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If switching circuitry is used to selectively couple RF signal paths to antenna port, then adaptability to support both TDD and FDD signals is improved, but EVM glitches occur during switching operations
Solution Approach 1:
The timing control circuitry activates the shunt switch on the disabled RF signal path before deactivating the thru switch on the enabled path. This preliminary action ensures that the disabled path is already isolated when the enabled path is switched off, preventing signal leakage and EVM glitches during the transition between TDD and FDD modes.
Solution Approach 2:
The shunt switch acts as an intermediary element between the RF signal path and ground. By providing a controlled path to ground through the shunt switch, the circuit ensures that disabled paths are properly isolated without directly conflicting with the active path, thereby maintaining signal integrity during mode switching.
2Reliability
If sequential switching of thru and shunt switches is implemented, then EVM glitches are reduced, but device complexity increases
Solution Approach 1:
The timing control circuitry integrates multiple control functions into a unified circuit that manages both thru and shunt switch activation sequences. By combining the control logic for sequential switching within a single integrated circuit, the design reduces the number of separate control elements needed while maintaining the required switching sequence for glitch-free operation.
3Productivity
If multiple RF signal paths are used for carrier aggregation, then productivity and data rates are improved, but insertion loss and phase differences increase
Solution Approach 1:
The switching circuitry is designed with path-specific optimization, where each RF signal path (TDD transmit, TDD receive, FDD) has dedicated thru and shunt switches tailored to its specific requirements. This local optimization allows each path to maintain optimal impedance and minimal insertion loss for its particular function while still being part of the overall carrier aggregation system.
Data Source
AI summary
Radio-frequency front end circuitry systems and methods for carrier aggregation include multiple RF signal paths, switching circuitry, and timing control circuitry. The switching circuitry is configured to selectively couple the RF signal paths to an antenna port and includes, for each RF signal path, a thru switch connecting a corresponding RF signal path to the antenna port when activated, and a shunt switch connected between its corresponding signal path and RF ground. The timing control circuitry for each TDD path may include a thru control signal path connecting a control signal to the thru switch and a shunt control signal path with at least one delay element to delay the shunt control signal. The timing control circuitry may include delay elements, a resistor-capacitor circuit and a Schmitt trigger. The timing control circuitry may include a non-overlap circuit for each TDD path to mitigate overlap in switching operations.