RF Component Inductor Q Value Preservation
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Solution Overview
Problem
In RF components with a stacking structure, the proximity of inductor components to wiring electrodes induces eddy currents, leading to reduced inductance and deteriorated Q values, which affects the overall component performance and size.
Innovation Solution
The implementation of no-electrode-forming areas on the substrates where wiring electrodes are not formed over the inductor components, reducing the amount of wiring electrodes near the inductors and minimizing eddy current induction, thereby maintaining the Q value and allowing for smaller component size without compromising performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wiring electrodes are formed in substrates to create complicated circuits, then circuit functionality is improved, but eddy currents are induced in the wiring electrodes near inductor components, reducing the Q value of the inductor
Solution Approach 1:
The patent applies local quality by creating no-electrode-forming areas specifically in regions that overlap with inductor components in plan view. This means wiring electrodes are intentionally omitted only in localized zones around inductors while maintaining electrode formation in other circuit areas, thus preserving overall circuit functionality while eliminating eddy current paths near the inductor components.
Solution Approach 2:
The substrate surface is segmented into two functional zones: areas with wiring electrodes for circuit formation and no-electrode-forming areas around inductor components. This segmentation allows the circuit to be divided into functional regions, enabling current to flow through electrodes in non-inductor areas while preventing eddy current induction in the inductor-proximity zones.
2Volume of moving object
If inductor components are placed between substrates to reduce component size, then miniaturization is achieved, but the proximity to wiring electrodes causes eddy currents that deteriorate inductor characteristics
Solution Approach 1:
The patent maintains the compact stacking structure with inductors positioned between substrates but applies local quality by creating electrode-free zones in the substrate layers where electrodes would otherwise be formed near the inductor components. This selective omission of electrodes in specific locations allows miniaturization to be achieved while preventing harmful eddy currents in the critical inductor regions.
3Reliability
If wiring electrodes are reduced to minimize eddy currents, then Q value is improved, but circuit complexity and functionality may be compromised
Solution Approach 1:
The patent resolves this contradiction by applying local quality - wiring electrodes are removed only in specific no-electrode-forming areas that overlap with inductor components in plan view, while electrodes are maintained in all other circuit regions. This localized approach preserves the majority of circuit functionality and complexity while eliminating eddy currents only where they would harm inductor performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the reduction in inductance and Q value of the inductor components, enabling the reduction of overall component size while maintaining high performance, and allows for the integration of additional components without interference.
Implementation Method 1
when the inductor component approaches the wiring electrodes in the substrates 501 and 503, eddy currents are induced in the wiring electrodes in a direction that prevents a change in magnetic flux of the inductor component
Implementation Method 2
eddy currents are induced in the wiring electrodes in a direction that prevents a change in magnetic flux
Data Source
AI summary
First no-electrode-forming areas where first wiring electrodes such as internal wiring electrodes and external connection terminals are not formed are set to ranges that overlap inductor components in a plan view of at least one of dielectric layers of a first substrate, and second no-electrode-forming areas where second wiring electrodes such as internal wiring electrodes and mounting electrodes are not formed are set to ranges that overlaps the inductor components in a plan view of at least one of dielectric layers of a second substrate. Accordingly, reduction of the inductance of the inductor components, which is caused by the first and second wiring electrodes crossing the magnetic field of the inductor components, can be suppressed. Therefore, the overall component size can be reduced without deteriorating the Q value of the inductor components by configuring an RF component with a stacking structure.