RF IC and Memory Die Stacking with Ground Shield

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Solution Overview

Problem

Stacked-die packaging technology often results in RF desense due to undesired signal coupling between semiconductor memory dies and RF devices, leading to degraded RF performance in semiconductor packages.

Innovation Solution

A semiconductor package structure is designed with a system-on-chip (SOC) die and memory die stacked vertically, where the RF circuit's sensitive device regions are arranged to be spaced apart from the memory I/O electrical path, and a metal plate connected to ground is placed below the sensitive regions to act as a shielding layer, preventing signal coupling and maintaining RF performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If stacked-die packaging technology is used to integrate memory die and RF devices, then component density is improved, but RF performance deteriorates due to signal coupling

Engineering Contradiction:
Improvecomponent densityVSAvoidRF performance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A ground reference layer is introduced as an intermediary between the memory die and RF sensitive devices. This ground layer acts as a shield that blocks undesired signal coupling while maintaining the stacked-die configuration, thus preserving both high component density and RF performance

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The package structure is segmented into distinct functional layers with the ground reference layer separating memory I/O paths from RF sensitive devices. This segmentation creates electrical isolation between noisy memory circuits and sensitive RF circuits, preventing signal coupling while maintaining vertical integration

Inventive Principle:
Principle #1Segmentation

2Volume of moving object

If memory die is stacked with RF devices, then size is reduced, but signal coupling increases causing RF desense

Engineering Contradiction:
Improvepackage sizeVSAvoidsignal coupling
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The ground reference layer serves as a protective intermediary that blocks electromagnetic coupling between the memory die and RF devices. This allows the compact stacked-die configuration to be maintained while preventing the harmful signal coupling that would otherwise occur

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Instead of horizontally separating memory and RF components (which would increase package size), the solution uses vertical layering with the ground reference layer positioned between them in the Z-dimension. This maintains compact footprint while providing effective shielding

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively eliminates or mitigates signal coupling, preventing RF desense and enhancing RF performance while allowing for a compact package size and increased design flexibility in wire bonding.

Implementation Method 1

a metal plate connected to ground is placed below the sensitive regions to act as a shielding layer, preventing signal coupling

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentEP3291296B1Semiconductor package with a memory die and an integrated circuit die having an RF circuit
Publication Date: 2022.05.11 MEDIATEK INC
  • EP3291296B1 patent drawingFigure 1
  • EP3291296B1 patent drawingFigure 2A
  • EP3291296B1 patent drawingFigure 2B

AI summary

A semiconductor package structure is provided. The semiconductor package structure includes a package substrate. An integrated circuit (IC) die having a radio frequency (RF) circuit and a memory die are stacked over the package substrate. The memory die entirely covers a first surface portion of the package substrate to define a second surface portion of the package substrate exposed from the memory die, and the IC die partially covers the first surface portion and the second surface portion of the package substrate. The RF circuit includes a first sensitive device region corresponding to the second surface portion of the package substrate and a second sensitive device region corresponding to the first surface portion of the package substrate and offsetting a memory input/output (I/O) electrical path of the memory die, as viewed from a top-view perspective.