Late Fusing Processor Features via RF NVRAM
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Solution Overview
Problem
The current semiconductor manufacturing process requires producing and tracking multiple product SKUs, leading to significant costs and overhead expenditures due to the need for multiple physical SKUs to satisfy customer demands and business objectives, which is inefficient and results in inventory build-up issues.
Innovation Solution
Implementing late fusing of processor features using non-volatile memory, specifically through RF NVRAM, allows for the configuration of CPU processors to specific SKUs closer to the end of the supply chain, reducing the need for multiple physical SKUs and enabling flexible configuration without altering the SKU'd configuration once set.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple physical SKUs are produced to satisfy customer demands, then customer requirements are met, but manufacturing costs and overhead expenditures increase significantly
Solution Approach 1:
The patent applies universality by creating a single base processor design that can serve multiple SKU configurations through software-based feature enabling/disabling. Instead of manufacturing different physical hardware variants, the system uses a universal processor platform where features are activated or deactivated through software controls, allowing one physical device to fulfill multiple customer requirements.
Solution Approach 2:
The patent implements parameter changes by transitioning from fixed hardware configurations to flexible software-controlled configurations. The processor's operational parameters (which features are enabled) can be changed after manufacturing through software updates, allowing the same physical hardware to adapt to different SKU requirements without physical reconfiguration.
2Reliability
If multiple physical SKUs are tracked for inventory purposes, then product configuration tracking is achieved, but inventory management complexity and overhead increase
Solution Approach 1:
The patent applies copying by replacing physical SKU variants with a single base model that is copied through software configuration. Instead of tracking multiple physical inventory types, the system tracks one base processor type and uses software copies (configuration states) to represent different SKUs, significantly simplifying inventory management while maintaining configuration tracking capability.
3Ease of manufacture
If base CPUs are configured to specific SKUs early in the supply chain, then configuration is determined, but flexibility to respond to customer demand changes is reduced
Solution Approach 1:
The patent applies preliminary action by preparing the base processor with all potential features available but not yet activated. The configuration action is postponed until closer to the point of sale or customer order, allowing the system to respond to actual demand rather than requiring advance configuration decisions. This delayed configuration maintains manufacturing simplicity while enabling demand flexibility.
Data Source
AI summary
In accordance with disclosed embodiments, there are provided systems, methods, and apparatuses for implementing late fusing of processor features using a non-volatile memory. For instance, there is disclosed in accordance with one embodiment a functional semiconductor package, including: a processor core configurable via a plurality of configuration registers; a non-volatile storage, in which a first portion of the non-volatile storage includes permanently lockable storage that once written cannot be overwritten or modified, and in which a second portion of the non-volatile storage includes the plurality of configuration registers; a first write interface to the non-volatile storage, in which the permanently lockable storage of the non-volatile storage is wirelessly writable externally from the functional semiconductor package via the first write interface; a second write interface to the non-volatile storage through which the plurality of configuration registers are writable; configuration data for the processor core written wirelessly into the permanently lockable storage of the non-volatile storage; and in which the configuration data is distributed into the plurality of configuration registers via the second write interface at every boot of the functional semiconductor package. Other related embodiments are disclosed.