RF Amplifier Package Layout for Higher Resonance Frequency

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing RF amplifier packages face challenges in achieving high-frequency performance due to parasitic capacitance and inefficiencies in the layout of drain and gate fingers, which affect gain, power, and efficiency.

Innovation Solution

The RF amplifier package incorporates a second set of drain fingers extending between the second drain bondbar and the gate bondbar, with modified positioning and connectivity to increase the resonance frequency, allowing for shorter bondwires and improved high-frequency operation, along with additional DC blocking capacitors to reduce shunt inductance and enhance resonance frequency compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional RF amplifier package layout is used with standard drain and gate finger configuration, then the structure is simple and easy to manufacture, but parasitic capacitance degrades gain, power, and efficiency at high frequencies

Engineering Contradiction:
Improveamplifier performanceVSAvoidFET structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The drain region is segmented into multiple drain fingers (first set and second set) with different orientations relative to the gate fingers. This segmentation reduces parasitic capacitance between drain and gate by distributing the capacitive coupling across multiple smaller fingers, thereby improving amplifier performance at high frequencies while maintaining a manageable structural complexity.

Inventive Principle:
Principle #1Segmentation

2Speed

If longer bondwires are used to connect drain bondbars to output terminal, then the layout is easier to implement, but the inductance increases which degrades resonance frequency compensation and high-frequency performance

Engineering Contradiction:
Improveresonance frequencyVSAvoidwire bonding ease
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The second drain bondbar is positioned at a location that allows bondwires to connect to the output terminal through a more direct path, utilizing spatial arrangement in multiple dimensions. This reduces the bondwire length and associated inductance, enabling better resonance frequency compensation and high-frequency operation while still being manufacturable with standard wire bonding processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If the second drain bondbar is positioned far from the gate bondbar, then the layout is simpler, but the first bondwires become longer increasing inductance and reducing resonance frequency

Engineering Contradiction:
Improveoperational frequencyVSAvoidbondwire length
Core Design Contradiction:
SpeedVSLength of stationary object

Solution Approach 1:

The position of the second drain bondbar is optimized to balance multiple parameters: it is placed close enough to the gate bondbar to minimize first bondwire length and inductance, yet positioned to allow proper spacing for parasitic capacitance management. This parameter optimization enables the amplifier to operate at higher frequencies by reducing the LC resonance frequency determined by the bondwire inductance and drain capacitance.

Inventive Principle:
Principle #35Parameter changes

4Reliability

If drain fingers are arranged parallel to gate fingers, then the layout is conventional and easy to manufacture, but parasitic capacitance between drain and gate degrades amplifier performance

Engineering Contradiction:
Improvegain and efficiencyVSAvoidlayout complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The drain fingers are arranged in two different orientations: the first set of drain fingers extends in a first direction relative to the gate fingers, while the second set extends in a second direction. This asymmetric arrangement reduces parasitic capacitance between drain and gate by minimizing the overlapping area between oppositely charged regions, thereby improving gain and efficiency while remaining manufacturable with standard fabrication processes.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability and efficiency of the RF amplifier package by allowing operation at higher frequencies, improving output impedance and power amplifier performance while reducing the risk of damage during wire bonding.

Implementation Method 1

A known approach to mitigate the influence of Cds on performance is to make use of an inductor that is placed parallel to Cds. Together these components should display a parallel resonance at or close to the operational frequency of the amplifier.

Methodology Applied
Scientific EffectParallel resonance: Resonance

Implementation Method 2

Capacitor C1 should be sufficiently large to act as an RF short at or close to the operational frequency. At DC, C1 blocks a DC path to ground.

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS12142583B2RF amplifier package
Publication Date: 2024.11.12 AMPLEON NETHERLANDS
  • US12142583B2 patent drawing
  • US12142583B2 patent drawing
  • US12142583B2 patent drawing

AI summary

Example embodiments relate to RF amplifier packages. One example RF amplifier package includes an input terminal, an output terminal, a substrate, a first DC blocking capacitor having a first terminal and a grounded second terminal, and a second conductor die mounted on the substrate. The semiconductor die includes a semiconductor substrate, an RE power field-effect transistor (FET) integrated on the semiconductor substrate, a gate bondbar, a first drain bondbar, a second drain bondbar, and a plurality of first bondwires connecting the second drain bondbar to the first terminal of the first DC blocking capacitor. The RF power FET includes a plurality of gate fingers that are electrically connected to the gate bondbar and that each extend from the gate bondbar towards the first drain bondbar and underneath the second drain bondbar, a first set of drain fingers, and a second set of drain fingers.