Capacitively Coupled RF Power Amplifier for Compact Power Combining
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Solution Overview
Problem
Existing RF power amplifiers face challenges in efficiently supporting varying loads at GHz frequencies while minimizing silicon area and maintaining high efficiency and linearity, particularly in CMOS technology, where long transmission lines are not feasible due to size and performance issues.
Innovation Solution
A dual-input power amplifier design utilizing a main and auxiliary amplifier operating as current sources with capacitance coupling, avoiding transmission lines, and employing stacked MOSFETs to support high voltages, along with a combiner using a series capacitor for load modulation, which allows for efficient power combining and reduced loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If long transmission lines are used for power combining in RF power amplifiers, then power combining can be achieved, but the silicon area increases and performance degrades at GHz frequencies
Solution Approach 1:
The patent combines the power combining function with the output matching network by integrating the combiner into the existing output stage architecture. This eliminates the need for separate long transmission lines while achieving the same power combining effect through shared circuit elements and topology integration.
Solution Approach 2:
The patent transitions from using transmission lines (one-dimensional waveguide structure) to using integrated circuit topologies (two-dimensional planar structure) for power combining. This dimensional change enables compact implementation in CMOS technology while maintaining power combining functionality at GHz frequencies.
2Power
If long transmission lines are used for power combining, then power combining can be achieved, but efficiency decreases due to losses
Solution Approach 1:
The patent merges the power combining function with the output matching network, eliminating separate transmission lines that would introduce losses. The integrated approach uses shared reactive elements and direct current source combining to achieve power combining with minimal energy loss.
Solution Approach 2:
The patent extracts and removes the lossy transmission line elements from the power combining architecture, replacing them with direct current source combining and integrated matching networks that achieve the same function with significantly reduced energy losses.
3Loss of energy
If dual input power amplifier design with main and auxiliary amplifiers is used, then efficiency can be improved, but device complexity increases
Solution Approach 1:
The patent combines the dual amplifier architecture with an integrated combiner and matching network, merging multiple functions into a unified structure. The main and auxiliary amplifiers share common biasing, combining, and matching elements, which reduces overall device complexity while maintaining high efficiency benefits.
Solution Approach 2:
The patent implements multi-functional circuit elements that serve multiple purposes: the combiner also acts as part of the matching network, and the same reactive elements are used for both power combining and impedance transformation. This universality reduces the number of discrete components and simplifies the overall device architecture.
4Area of stationary object
If compact implementation is achieved by avoiding transmission lines, then area is reduced, but design complexity increases
Solution Approach 1:
The patent merges the combiner and matching network into a single integrated structure, eliminating the need for separate transmission lines. This consolidation achieves compact area while the unified design actually reduces overall circuit complexity compared to having separate discrete components.
Solution Approach 2:
The patent segments the amplifier into functional blocks (main amplifier, auxiliary amplifier, integrated combiner-matching network) that can be independently designed and optimized. This modular segmentation makes the compact design more manageable and reduces overall design complexity through systematic decomposition.
Data Source
AI summary
Methods and apparatus for implementing a power efficient amplifier device through the use of a main (primary) and auxiliary (secondary) power amplifier are described. The primary and secondary amplifiers operate as current sources providing current to the load. Capacitance coupling is used to couple the primary and secondary amplifier outputs. In some embodiments the combination of primary and secondary amplifiers achieve high average efficiency over the operating range of the device in which the primary and secondary amplifiers are used in combination as an amplifier device. The amplifier device is well suited for implementation using CMOS technology, e.g., N-MOSFETs, and can be implemented in an integrated circuit space efficient manner that is well suited for supporting RF transmissions in the GHz frequency range, e.g., 30 GHz frequency range. The primary amplifier in some embodiments is a CLASS-AB or B amplifier and the secondary amplifier is a CLASS-C amplifier.