RF Power Semiconductor Charge Trapping Compensation

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Solution Overview

Problem

Radio frequency (RF) power semiconductor devices, particularly those based on compound semiconductors like GaN, suffer from charge trapping effects that lead to long-lasting memory effects, such as transconductance frequency dispersion and current collapse, which existing digital predistortion techniques are insufficient to compensate for, resulting in nonlinear amplifier gain and phase transfer characteristics.

Innovation Solution

A method is introduced that involves applying an analog gate bias waveform to RF power semiconductor devices based on measured time-varying gain characteristics, systematically generated from a signal envelope using a charge trap occupancy model with low-pass filter characteristics, to reduce gain errors associated with charge trapping events lasting longer than one microsecond.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If digital predistortion techniques are used to compensate for charge trapping effects, then implementation complexity is reduced, but compensation effectiveness is insufficient for long memory effects lasting longer than one microsecond

Engineering Contradiction:
Improveimplementation complexityVSAvoidcompensation effectiveness
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent replaces digital signal processing techniques with an analog compensation system that directly counteracts charge trapping effects. The analog gate bias waveform is generated continuously and applied in real-time to the power amplifier gate, substituting discrete digital correction with continuous analog control to effectively compensate for long-duration memory effects

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system generates the analog gate bias waveform in advance based on the envelope of the RF input signal, before the charge trapping effects fully manifest. This preliminary action allows the compensation signal to be ready and applied proactively, countering the memory effects before they significantly degrade amplifier performance

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If analog gate bias waveform compensation is applied to reduce gain errors from charge trapping, then amplifier gain linearity is improved, but system complexity increases

Engineering Contradiction:
Improveamplifier gain linearityVSAvoidsystem complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary analog signal generation system that processes the RF input envelope and produces a compensating gate bias waveform. This intermediary component acts as a mediator between the input signal and the power amplifier, transforming the input envelope characteristics into a compensation signal that corrects charge trapping effects without requiring complex digital processing

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes the gate bias parameter based on the instantaneous envelope of the RF input signal. By modulating the gate bias voltage in accordance with the input signal characteristics, the system adapts to varying operating conditions and maintains gain linearity across different signal levels, power conditions, and frequency ranges

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11387790B2Power semiconductor device with charge trapping compensation
Publication Date: 2022.07.12 ANALOG DEVICES INT UNLTD CO
  • US11387790B2 patent drawing
  • US11387790B2 patent drawing
  • US11387790B2 patent drawing

AI summary

The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error.