RF Receiver Architecture Using Integrated VCO and Discrete Time Filter
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Solution Overview
Problem
Current RF receiver architectures face challenges in achieving precise channel selection and high quality factor while being reconfigurable for multistandard operations, with existing solutions limited by phase noise, integration constraints, and inflexibility in channel bandwidth.
Innovation Solution
The proposed RF receiver incorporates a down-converting and sampling circuit with a discrete time filter having a variable passband, allowing for precise channel selection by controlling the central frequency and bandwidth, and utilizing a phase locked loop with a frequency signal generation circuit to transpose RF input signals from initial to lower frequency bands, enabling integration of key components and flexibility across multiple standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external off-chip VCO component is used to provide a local oscillator for mixing and down conversion, then the phase noise requirement can be met, but the integration of components is limited and reconfigurability for different standards is prevented
Solution Approach 1:
The patent merges the VCO and channel selection filter functions into a single integrated on-chip component, eliminating the need for external off-chip VCO components while maintaining phase noise performance and enabling reconfigurability for multiple standards including 2G, 3G, 4G, GPS, WiFi, and Bluetooth
Solution Approach 2:
The integrated VCO and filter component is designed to be universal, supporting multiple RF standards with different channel bandwidths and center frequencies through digital control, allowing a single component to replace multiple standard-specific components
2Ease of manufacture
If a fixed frequency synthesizer is used to perform down-conversion, then the manufacturing cost can be reduced, but the reconfigurability of the central frequency is practically impossible and the bandwidth constraint is extremely high
Solution Approach 1:
The patent implements a dynamic frequency synthesizer with a variable VCO that can be digitally controlled to change its output frequency and the filter's passband characteristics, enabling reconfigurability for different standards while maintaining cost-effectiveness through integration
Solution Approach 2:
The system changes key parameters including the VCO frequency, filter center frequency, and filter bandwidth dynamically based on the selected standard and channel, allowing a single fixed-frequency synthesizer architecture to support multiple frequency ranges through parameter modulation
3Device complexity
If a two-step channel selection technique is used with coarse selection at RF and fine selection at IF, then a trade-off between integration and performance is achieved, but the accuracy of frequency selection and quality factor are limited
Solution Approach 1:
The patent segments the channel selection process into digital coarse selection (sub-band selection) and analog fine selection (channel filtering), with the integrated VCO and filter providing both functions in a unified architecture that achieves higher frequency selection accuracy and quality factor than previous two-step approaches
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances channel selection precision and quality factor, enabling reconfigurable multistandard operation while allowing for the integration of key components, thus addressing the limitations of existing architectures.
Implementation Method 1
utilizing a phase locked loop with a frequency signal generation circuit to transpose RF input signals from initial to lower frequency bands
Implementation Method 2
perform frequency transposition and sampling to generate a discrete time signal in which a selected one of the plurality of sub-bands is brought from an initial frequency band to a lower frequency band
Data Source
Figure 1~3D
Figure 4~5A
Figure 5B~7B
AI summary
The invention concerns an RF receiver comprising: a down-converting and sampling circuit (104) adapted to: receive an RF input signal (RFIN) having a signal band (BWRF) comprising a plurality of sub-bands (BWIF), each sub-band comprising a plurality (2K) of channels separated by frequency channel spaces (ΔfCH); and perform frequency transposition and sampling to generate a discrete time signal in which a selected one of the plurality of sub-bands is brought from an initial frequency band to a lower frequency band (IF20±KΔfCH); and a discrete time filter (108) having a variable pass band, the central frequency (f0) of the discrete time filter being controllable to select any one of the plurality (2K) of channels of the selected sub-band.