RF Receiver Packet Detection Using Analog and Digital GO Circuits

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Solution Overview

Problem

Bluetooth receivers face challenges in accurately detecting RF data packets due to interference from adjacent channel interference (ACI), co-channel interference (CCI), and noise, which complicates signal reception and increases complexity and cost with the use of phase locked loops (PLLs) for symbol timing recovery.

Innovation Solution

An RF receiver system with analog and digital GO circuits that recognize data packets by sensing power and energy, respectively, and employ FIR filters to distinguish packets from noise and ACI, enabling improved gain control and demodulation functions, while an STR circuit cross-correlates preamble samples to decode data packets efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a phase locked loop (PLL) is used for symbol timing recovery, then timing accuracy is improved, but receiver complexity and cost increase

Engineering Contradiction:
Improvesymbol timing accuracyVSAvoidreceiver complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the essential timing recovery function from the complex PLL system and implements it through a simplified correlator-based approach that uses the known preamble sequence to directly determine symbol timing, eliminating the need for continuous phase tracking loops

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the expensive, continuous-operating PLL with a low-cost, burst-mode correlator that processes timing information only during the preamble period, using simple multiplication and accumulation operations instead of complex feedback control

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Measurement precision

If the RSSI operates continuously to detect data packets, then detection accuracy is improved, but false detection from interference increases

Engineering Contradiction:
Improvepacket detection accuracyVSAvoidfalse detection from interference
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a correlator as an intermediary between the RSSI and the packet detection logic, using the known preamble sequence as a reference to filter out interference and noise, allowing accurate detection even in the presence of ACI and CCI

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent uses the distinctive temporal pattern of the preamble (alternating +1 and -1 bits) as a signature that can be identified through correlation, effectively changing the detection criterion from simple power threshold to pattern recognition that is immune to interference

Inventive Principle:
Principle #32Color changes

3Reliability

If a long integration period is used for packet detection, then detection reliability is improved, but response time increases

Engineering Contradiction:
Improvedetection reliabilityVSAvoidresponse time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary correlation processing during the 5-bit preamble period to establish packet presence and timing, allowing the main data reception to begin immediately without requiring extended integration periods for detection

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7457378B1Apparatus and method for RF packet detection and symbol timing recovery
Publication Date: 2008.11.25 MEDIATEK INC
  • US7457378B1 patent drawing
  • US7457378B1 patent drawing
  • US7457378B1 patent drawing

AI summary

An RF receiver includes an analog GO circuit that recognizes the presence of a data packet within a received RF signal in the receiver's analog gain control section, and in response produces an analog GO signal, and a digital GO circuit that recognizes the presence of a data packet from the receiver's digital demodulator section, and in response produces a digital GO signal. Gain control functions within the analog gain control section, and digital demodulator functions within the digital demodulator section, are enabled in response to respective analog and digital GO signals. The system is capable of distinguishing a valid data packet from noise, co-channel interference and adjacent panel interference. A symbol timing recovery circuit within the receiver identifies periodic samples of a data packet preamble that most closely match the preamble bits, with the receiver employing a continuation of the identified periodic samples to decode the remainder of the data packet.