RF Receiver Dynamic Frequency Planning for Spur Interference

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Solution Overview

Problem

Integrated RF receivers face issues with unwanted signal coupling due to electrical or magnetic interactions between circuits, leading to signal distortion and artifacts, which traditional layout strategies and ground rings cannot completely eliminate.

Innovation Solution

The RF receiver employs a TV tuner chip with a clock synthesizer and digital processor that performs dynamic frequency planning, adjusting the clock signal frequency to minimize direct coupling, spur generation, and sub-harmonic interference by using a firmware-controlled algorithm to select optimal operating frequencies within a range of 190 MHz to 207 MHz in 1 MHz increments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If integrated circuit technology is used to combine circuits on-chip, then cost is reduced, but unwanted signal coupling between circuits increases

Engineering Contradiction:
ImprovecostVSAvoidunwanted signal coupling
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent dynamically changes the operating frequency parameter of the receiver to a frequency that minimizes unwanted signal coupling between circuits. By tuning the receiver frequency away from frequencies that cause coupling, the system maintains cost-effective integration while reducing harmful signal interactions.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If traditional layout strategies and ground rings are used to reduce coupling, then signal quality is improved, but coupling between circuits cannot be completely eliminated

Engineering Contradiction:
Improvesignal distortionVSAvoidcoupling elimination
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent employs dynamic frequency tuning, allowing the receiver to adapt its operating frequency in real-time based on detected coupling conditions. This dynamic approach complements static layout strategies by enabling the system to move away from problematic frequencies, providing more complete coupling elimination.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system uses feedback from signal quality detection to automatically adjust the operating frequency. When coupling is detected, the feedback mechanism triggers frequency retuning to a cleaner frequency, creating a closed-loop system that continuously maintains optimal signal quality.

Inventive Principle:
Principle #23Feedback

3Object-affected harmful factors

If frequency tuning is performed to reduce coupling, then signal quality is improved, but system complexity increases

Engineering Contradiction:
Improveunwanted signal couplingVSAvoidfrequency planning complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The receiver performs self-diagnosis of coupling conditions and automatically retunes its frequency without external intervention. This self-service capability reduces the need for complex external frequency planning while maintaining signal quality, as the system autonomously identifies and resolves coupling issues.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8224279B2Radio frequency (RF) receiver with dynamic frequency planning and method therefor
Publication Date: 2012.07.17 SILICON LABORATORIES INC
  • US8224279B2 patent drawing
  • US8224279B2 patent drawing
  • US8224279B2 patent drawing

AI summary

A radio frequency (RF) receiver comprises an analog receiver, a digital processor, and a clock synthesizer. The analog receiver has an input for receiving an RF input signal, and an output for providing a digital intermediate frequency (IF) signal. The digital processor has a first input for receiving the digital IF signal, a second input for receiving a clock signal, a signal output for providing an IF output signal, and a control output for providing a clock control signal. The clock synthesizer has an input for receiving the clock control signal, and an output for providing the clock signal. The digital processor controls a frequency of the clock signal dynamically in response to a channel selection input to reduce interference of sub-harmonics created by the digital processor on the analog receiver.