Resistive Memory Refresh Using RF Energy Harvesting
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Solution Overview
Problem
Resistive memory devices, such as PCRAM, suffer from resistance drift, leading to data retention failures due to high resistance states, which intensify over time, causing failures when the resistance exceeds a reference value, necessitating a method to prevent such failures.
Innovation Solution
A resistive memory apparatus incorporating a memory unit with a resistive memory cell array, a voltage generation unit capable of converting RF signals into DC voltage, and a control unit that performs refresh operations using the boosted DC voltage to maintain optimal resistance states, thereby extending data retention time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the phase-change material is heated to change resistance state for data storage, then the resistance state can be controlled, but resistance drift occurs and intensifies over time leading to data retention failure
Solution Approach 1:
The patent implements periodic refresh operations on the resistive memory cell array to counteract resistance drift. The controller periodically applies refresh signals to memory cells that have undergone programming operations, restoring their resistance states before data retention failure occurs. This periodic intervention extends the effective data retention time by repeatedly resetting the drift process.
Solution Approach 2:
The patent introduces a feedback mechanism where the controller monitors the state of memory cells and determines when refresh operations are needed. Based on programming history and timing information, the controller selectively applies refresh operations to specific memory cells, creating a closed-loop system that adapts to the actual drift conditions and optimizes data retention.
2Reliability
If refresh operations are performed periodically to prevent resistance drift, then data retention time is extended, but additional power consumption and operational complexity are introduced
Solution Approach 1:
The patent applies refresh operations selectively rather than to all memory cells continuously. The controller determines which specific memory cells require refresh based on their programming history and timing, applying refresh only when necessary. This partial action approach extends data retention while minimizing unnecessary power consumption from redundant refresh operations.
Solution Approach 2:
The patent recovers and utilizes the RF signal that would otherwise be wasted during wireless power transfer. The power management circuit rectifies and stores the RF signal energy in a capacitor, then uses this recovered energy to power the refresh operations. This transforms what would be discarded energy into a useful resource for maintaining data retention.
3Adaptability or versatility
If wireless power transfer via RF signal is used to power the memory apparatus, then power delivery is achieved without physical connections, but the RF signal must be converted to DC voltage requiring additional circuitry
Solution Approach 1:
The power management circuit performs multiple functions: it rectifies the RF signal to DC voltage, stores energy in a capacitor, and provides power to the memory cell array and controller. By consolidating these functions into a single integrated circuit block, the patent reduces overall system complexity despite the added capability of wireless power reception.
Solution Approach 2:
The capacitor in the power management circuit acts as an intermediary energy storage element between the RF signal source and the DC-powered memory circuits. It smooths the rectified voltage and provides stable power delivery, mediating the transition from wireless RF power to reliable DC operation for the sensitive memory components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively prevents resistance drift by periodically refreshing memory cells, maintaining desired resistance states and improving data retention time, thus enhancing the reliability of resistive memory devices.
Implementation Method 1
a voltage generation unit suitable for receiving a radio frequency (RF) signal and converting the RF signal into a direct current (DC) voltage
Data Source
AI summary
A resistive memory apparatus includes a memory unit including a resistive memory cell array, a voltage generation unit suitable for receiving a radio frequency (RF) signal, and converting the RF signal into a direct current (DC) voltage, and a control unit suitable for controlling a refresh operation to be performed on the resistive memory cell array, wherein the boosted DC voltage is used as an operation voltage for the refresh operation.


