Chip-Integrated RF Scope with Phase-Shifted Subsampling Traces

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Solution Overview

Problem

Current methods for analyzing and debugging corner or error cases in devices or chips often require external instruments like oscilloscopes, which can be complex and costly, and do not provide sufficient sample rate and resolution for enhanced accuracy.

Innovation Solution

A chip integrated scope (CS) system that uses subsampling techniques to enhance sample rate and resolution by merging RF signal traces with different phase-shifts, allowing for higher sampling rates without additional silicon area, test time, or design effort, and includes a CS control unit to synchronize and control the phase shifts for improved accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If external instruments like oscilloscopes are used for analyzing and debugging corner or error cases, then measurement capability is provided, but device complexity and cost increase

Engineering Contradiction:
Improvesignal trace analysis accuracyVSAvoidtesting system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the oscilloscope functionality directly into the chip by integrating the receiver, ADC, memory, and signal processing capabilities onto the same chip as the device under test. This eliminates the need for external oscilloscopes and reduces system complexity while maintaining measurement precision.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated scope on chip (IOSC) serves multiple functions: it acts as both the device under test and the measurement instrument. The receiver can capture signals from internal nodes and external inputs, providing universal debugging capability across different test scenarios without requiring separate specialized equipment.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If external instruments are used for signal analysis, then measurement capability is achieved, but testing cost increases

Engineering Contradiction:
Improvecorner case detection accuracyVSAvoidtesting cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The device tests itself by integrating the scope functionality within the chip. The IOSC uses the device's own receiver and processing resources to capture and analyze signals, eliminating the need for expensive external test equipment and reducing manufacturing and testing costs.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If subsampling techniques are used to enhance sample rate, then sample rate and resolution are improved, but signal processing complexity increases

Engineering Contradiction:
Improvesignal trace resolutionVSAvoidsignal processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The signal capture process is segmented into multiple passes, each capturing a portion of the signal at a lower sample rate. These segmented captures are then reconstructed in memory to form a complete high-resolution signal trace, allowing enhanced resolution without requiring high-speed processing throughout the entire signal path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple signal captures are performed in advance at different phases or time offsets, storing these preliminary captures in memory. The complete high-resolution signal is then reconstructed by combining these pre-captured segments, avoiding the need for complex real-time processing at high sample rates.

Inventive Principle:
Principle #10Preliminary action

4Speed

If multiple subsampled traces with different phase-shifts are merged, then apparent sample rate increases, but memory requirements and processing overhead increase

Engineering Contradiction:
Improveapparent sample rateVSAvoidmemory storage requirements
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

Instead of increasing the sample rate in the time domain, the system uses multiple captures in the phase domain (different phase shifts of the sampling clock). These captures taken from different phase dimensions are then combined to reconstruct a signal with higher apparent temporal resolution, effectively trading phase diversity for time-domain resolution.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10396912B1Method and system for a subsampling based system integrated scope to enhance sample rate and resolution
Publication Date: 2019.08.27 NXP BV
  • US10396912B1 patent drawing
  • US10396912B1 patent drawing
  • US10396912B1 patent drawing

AI summary

This specification discloses methods and systems for implementing a chip integrated scope (i.e., chip scope (CS)), which is a feature that allows a user to scope RF signals (internally and externally to the DUT (device under test)), by using the RF receive path (including amplifier, filter, ADC, DSP) to capture and store signal traces. In some embodiments, this specification discloses methods and systems to enhance the sampling rate and resolution of these signal traces by using subsampling techniques where a post-processing merges the subsampled traces (with different phase-shifts of say, for example, 0°, 90°, 180°, and 270°) into a single trace that will appear to have a sampling rate that is higher than a pre-determined sampling rate used to collect these subsampled traces.