RF Transmitter Sign Selection Timing for Cleaner I/Q Polarity Changes
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Solution Overview
Problem
Existing radio frequency (RF) transmitters experience signal distortion and noise due to misalignment of the sign selection signal with the rising or falling edge of in-phase (I) and quadrature (Q) signals, leading to reduced power output and receiver sensitivity.
Innovation Solution
The implementation of sign selection adjusting circuitry that generates adjusted sign selection signals for each quadrature signal, applied at a time offset from the transition edge, to accurately change the polarity of stored values in the RF digital-to-analog converter (DAC), thereby reducing signal pulses and improving signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single sign selection signal is used to select polarity of I/Q signals, then the device complexity is reduced, but signal distortion and noise increase due to misalignment with signal edges
Solution Approach 1:
The single sign selection signal is segmented into separate sign selection signals for each quadrature signal (I and Q). This segmentation allows independent timing control for each signal path, eliminating the misalignment problem that caused signal distortion and noise while maintaining manageable circuit complexity through modular signal processing.
Solution Approach 2:
The sign selection signals are generated and adjusted in advance before the actual modulation and transmission processes. By preparing the sign selection signals beforehand and aligning them with the rising or falling edges of the quadrature signals, the system prevents signal distortion from occurring in the first place, rather than attempting to correct it later.
2Reliability
If the sign selection signal is aligned with the rising or falling edge of I/Q signals, then signal quality improves, but timing precision requirements increase
Solution Approach 1:
The system employs feedback mechanisms to monitor the alignment between sign selection signals and quadrature signal edges. By detecting timing deviations and adjusting the sign selection signal timing accordingly, the system maintains accurate alignment without requiring extremely precise initial timing settings, thus improving signal quality while reducing the stringency of timing precision requirements.
3Reliability
If multiple adjusted sign selection signals are generated for each quadrature signal, then signal distortion is reduced, but device complexity increases
Solution Approach 1:
The sign selection adjusting circuitry is designed to generate multiple adjusted sign selection signals using a universal control mechanism. This multi-functional circuit can handle both I and Q quadrature signals with the same adjustment logic, reducing overall device complexity compared to having separate dedicated circuits for each signal path while still providing the necessary signal quality improvements.
Data Source
AI summary
Embodiments disclosed herein relate to improving a power output of a transmitter of an electronic device. To do so, the transmitter may include signal selection circuitry to adjust a sign selection signal to accurately transition between polarities of a quadrature (e.g., I or Q) component signal stored in or for which an indication is stored in a storage cell of a radio frequency digital-to-analog converter. The sign selection signal may generate a separate adjusted sign selection signal for each polarity of each quadrature component signal such that a transition of the selection signal between a first value and a second value (e.g., logic high and low) occurs when the respective quadrature (e.g., +/â and I/Q) component signal is a logic low. In this way, the signal selection circuitry reduces an error pulse in the output of the transmitter.