RF Signal Synthesis Using Maximum Likelihood Bit-Stream Encoding

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Solution Overview

Problem

Existing direct synthesis techniques for RF signals, such as delta-sigma modulators, face challenges at higher sampling frequencies due to non-linear quantizers, difficulty in parallelization, limited input signal range, and high oversampling ratios, leading to inefficiencies and instability.

Innovation Solution

The use of maximum likelihood sequence estimation to produce a digital stream that minimizes error after filtering, followed by an analog restitution filter to generate an RF signal, which approximates the original digital RF input signal, employing Viterbi decoding, Reduced State Sequence Estimation, or the M algorithm, and utilizing passive filters like R-L-C circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If delta-sigma modulators are used for direct synthesis of RF signals, then high accuracy digital to analog conversion can be achieved, but the technique becomes difficult to implement at higher sampling frequencies (1 GHz and above) due to non-linear quantizers and difficulty in parallelization

Engineering Contradiction:
Improvedigital to analog conversion accuracyVSAvoidsampling frequency
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent changes the fundamental parameters of the modulation approach by replacing the traditional delta-sigma modulator architecture with a direct digital synthesis method using maximum likelihood sequence estimation. This involves changing the quantizer linearity parameter, the modulation index, and the encoding algorithm to enable operation at higher sampling frequencies while maintaining conversion accuracy.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the mechanical/algorithmic complexity of delta-sigma modulation with a different computational approach based on maximum likelihood sequence estimation. This replacement changes the underlying mechanism from iterative error feedback to probabilistic sequence optimization, enabling parallelization and higher frequency operation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If delta-sigma modulators are used for direct synthesis of RF signals, then high accuracy conversion can be achieved, but the algorithm is difficult to parallelize and hence implement at lower clock frequencies

Engineering Contradiction:
Improveconversion accuracyVSAvoidalgorithm parallelization difficulty
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the signal processing into independent parallel paths by replacing the sequential error-feedback mechanism of delta-sigma modulators with a parallelizable maximum likelihood sequence estimation algorithm. This segmentation allows multiple processing elements to operate simultaneously, reducing the clock frequency requirement while maintaining accuracy.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If delta-sigma modulators are used for direct synthesis of RF signals, then conversion can be achieved, but the input signal is typically limited to a fraction of the reference voltage, leading to poor power efficiency

Engineering Contradiction:
Improveconversion stabilityVSAvoidpower efficiency
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent changes the voltage utilization parameter by allowing the input signal to utilize a larger portion of the reference voltage range. The maximum likelihood sequence estimation algorithm maintains stability through probabilistic decision-making rather than requiring the input to be limited to a fraction of the reference voltage, thereby improving power efficiency while maintaining conversion stability.

Inventive Principle:
Principle #35Parameter changes

4Measurement precision

If high oversampling ratios (100 or more) are used in delta-sigma modulators for higher resolutions, then conversion accuracy improves, but the complexity and power consumption increase

Engineering Contradiction:
ImproveresolutionVSAvoidoversampling ratio requirement
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent substitutes the high-oversampling ratio mechanism with a different resolution-achieving mechanism based on maximum likelihood sequence estimation. Instead of relying on high oversampling ratios (100 or more) to achieve higher resolutions, the new approach uses optimized encoding algorithms that achieve the same or better resolution with lower oversampling ratios, thereby reducing device complexity and power consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9760338B2Direct digital synthesis of signals using maximum likelihood bit-stream encoding
Publication Date: 2017.09.12 INTEL CORP
  • US9760338B2 patent drawing
  • US9760338B2 patent drawing
  • US9760338B2 patent drawing

AI summary

Methods and apparatus are provided for direct synthesis of RF signals using maximum likelihood sequence estimation. An RF digital RF input signal is synthesized by performing maximum likelihood sequence estimation on the digital RF input signal to produce a digital stream, such that after filtering by a prototype filter the produced digital stream produces a substantially minimum error. The substantially minimum error comprises a difference between a digital output of the prototype filter and the digital RF input signal. The digital stream is substantially equal to the input digital RF signal. The digital stream can be applied to an analog restitution filter, and the output of the analog restitution filter comprises an analog RF signal that approximates the digital RF input signal.