RF Sloped Via Interposer for Low-Loss mmWave Layer Transitions
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Solution Overview
Problem
Existing connector technologies for electronic devices, particularly at high frequencies such as millimeter wave, face limitations in signal integrity and layer transitions, leading to increased insertion loss and return loss.
Innovation Solution
A multi-level interposer with RF sloped vias is introduced, featuring a sloped metal signal layer and lateral metal ground layers, which maintains continuous impedance and reduces insertion loss by up to 7% compared to traditional via structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional via structures are used for layer transitions in high frequency applications, then the device complexity is reduced and manufacturing is easier, but insertion loss increases and signal integrity deteriorates
Solution Approach 1:
The patent applies curvature by transitioning from traditional straight vertical vias to sloped vias with curved transitions. The sloped via structure includes a via hole that slopes relative to the substrate surface, with conductive material forming a curved path through the dielectric layers. This curved geometry reduces impedance discontinuities at layer transitions, thereby reducing insertion loss in high frequency applications while maintaining manufacturing feasibility through standard via formation processes adapted for sloped holes.
Solution Approach 2:
The patent changes the geometric parameters of the via structure by introducing a slope angle relative to the substrate surface. The via hole is formed at an angle rather than perpendicular to the substrate, and the conductive material is deposited to follow this sloped path. This parameter change optimizes the electromagnetic field distribution and reduces reflections at interface transitions, improving signal integrity without requiring fundamental changes to the manufacturing process.
2Reliability
If the number of layers is minimized in EHF range applications, then manufacturing complexity is reduced, but routing density and signal integrity are compromised
Solution Approach 1:
The sloped via structure with curved transitions provides smooth impedance matching between layers, reducing signal reflections and maintaining signal integrity. The curved path of the conductive material through the dielectric creates a gradual transition rather than abrupt layer crossings, which is particularly beneficial for EHF range signals that are sensitive to discontinuities.
Solution Approach 2:
The patent applies different geometric characteristics to different parts of the via structure. The via hole slopes at a specific angle in certain regions while maintaining vertical walls in other regions, and the conductive material is selectively deposited to follow the sloped path only where needed. This local differentiation optimizes signal integrity at critical transition points while minimizing overall structure complexity.
3Loss of energy
If face via structures are used in printed circuit boards to lessen loss impact, then insertion loss is reduced compared to traditional vias, but return loss increases and frequency limitations are encountered
Solution Approach 1:
The sloped via structure incorporates curved transitions that provide gradual impedance matching, reducing both insertion loss and return loss. The curved path of the conductive material creates a smooth transition that minimizes abrupt changes in electromagnetic field distribution, thereby reducing signal reflections and improving return loss performance compared to face via structures.
Solution Approach 2:
The sloped via acts as an intermediary structure between traditional vertical vias and coplanar waveguides. It provides a transition path that gradually changes the impedance profile, serving as a mediator that reduces both insertion loss and return loss by avoiding the abrupt transitions characteristic of traditional via structures while maintaining compatibility with standard PCB manufacturing processes.
Data Source
AI summary
An electronic device may include an IC, a grid array substrate, and a multi-level interposer coupled between the IC and the grid array substrate. The multi-level interposer may have dielectric layers, and a sequence of metal levels carried by respective dielectric layers, and an RF sloped via including a sloped metal signal layer extending from a first metal level, through a second metal level, and to a third metal level, and a respective sloped lateral metal ground layer adjacent each side of the sloped metal signal layer.