RF-SOI Trap-Rich Layer Doping for Back-Gate Isolation

Solution Overview

Problem

The back-gate effect in radio frequency (RF) silicon-on-insulator (SOI) substrates, caused by parasitic surface conduction and parasitic gate electrodes, affects the performance of RF devices by inducing leakage currents and threshold voltage shifts, particularly in high-voltage switching transistors.

Innovation Solution

Implementing a trap-rich layer with localized doping and independent biasing via through-box contacts to reduce the resistivity of specific regions in the trap-rich layer, thereby enhancing charge transfer rates and isolating circuits from back-gate effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a trap-rich layer is introduced to reduce parasitic surface conduction, then RF device performance is improved, but back-gate effects are introduced that cause leakage currents and threshold voltage shifts

Engineering Contradiction:

ImproveRF device performanceVSAvoidback-gate effects

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by creating a doped region specifically within the trap-rich layer at the location of each RF device. This localized doping modifies the electrical properties only where needed - reducing resistivity and controlling back-gate effects - while preserving the trap-rich characteristics in other regions. The doped region is formed by implanting dopant atoms at a specific depth range within the trap-rich layer, creating a spatially differentiated structure that addresses back-gate effects without compromising overall RF performance.

Inventive Principle:

Principle #3Local quality

2Power

If high voltages are applied to switching transistors, then switching capability is improved, but electric fields are induced in the BOX layer and trap-rich layer that couple to the bulk substrate, enhancing back-gate effects

Engineering Contradiction:

Improveswitching capabilityVSAvoidback-gate coupling

Core Design Contradiction:

PowerVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a doped region as an intermediary element between the trap-rich layer and the bulk substrate. This doped region acts as a mediator that controls the electric field distribution and reduces the coupling between high-voltage switching transistors and the bulk substrate. By adjusting the doping concentration and depth, the intermediary region manages the electric field pathways, allowing high-voltage operation while mitigating unwanted back-gate coupling effects.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Speed

If the resistivity of the trap-rich layer is reduced via doping, then charge transfer rate is improved, but the isolation effect of the trap-rich layer is weakened

Engineering Contradiction:

Improvecharge transfer rateVSAvoidcircuit isolation

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent applies local quality by creating a doped region specifically within the trap-rich layer at the location of each RF device. This localized doping modifies the electrical properties only where needed - reducing resistivity and controlling back-gate effects - while preserving the trap-rich characteristics in other regions. The doped region is formed by implanting dopant atoms at a specific depth range within the trap-rich layer, creating a spatially differentiated structure that addresses back-gate effects without compromising overall RF performance.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively mitigates back-gate effects by improving ON-state conduction and reducing OFF-state current leakage in RF devices, maintaining circuit performance and isolation without interfering with adjacent circuits.

Implementation Method 1

a first implant in a region of the trap-rich layer that is immediately below the first circuit, wherein the first implant is configured to be biased with a first voltage

Methodology Applied

Scientific EffectDoping: Dopants

Implementation Method 2

based on the doping, reducing a resistivity of said region, thereby increasing a charge transfer rate of said region

Methodology Applied

Scientific EffectCharge transfer: Conduction (electrical)

Implementation Method 3

biasing said region with a voltage that is based on an operating state of the SOI circuit, thereby reducing the back-gate effects

Methodology Applied

Scientific EffectElectric field: Electric Field

Data Source

PatentUS20250393268A1Back-gate effect control via doping

Publication Date: 2025.12.25 MURATA MFG CO LTD

AI summary

Methods and structures for mitigating back-gate effects in a radio frequency (RF) silicon-on-insulator (SOI) substrate, RF-SOI, are presented. According to one aspect, a first implant or junction is formed in a region of a trap-rich layer (TRL) of the RF-SOI that is located below a first circuit/device to protect. The first implant or junction is fully contained within the TRL. A planar surface area of the first implant and/or junction fully contains a projection of a planar surface area of the first circuit and/or device. The first implant or junction is biased via a through BOX contact (TBC) that penetrates the BOX layer at a shallow trench isolation region formed in the RF-SOI. According to another aspect, a second implant or junction is formed in a region of the TRL below a second circuit/device. The first and second implants or junctions are disjoint and separated by an undoped region of the TRL.