RF SOI Switch Structure for Lower RON×COFF and Higher PMAX
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Solution Overview
Problem
As device dimensions scale down, semiconductor-on-insulator (SOI) substrates become less suitable for radio frequency (RF) switching applications due to increased parasitic capacitances, self-heating effects, and decreased power handling capabilities.
Innovation Solution
The implementation of a radio frequency (RF) semiconductor-on-insulator (SOI) device with a thick buried oxide (BOX) and a thin semiconductor layer, along with the engineering of source and drain regions using nickel silicides, to minimize OFF-state capacitance and maintain or decrease ON-state resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device dimensions are scaled down, then integration density is improved, but parasitic capacitances increase and power handling capability deteriorates
Solution Approach 1:
The patent changes the physical parameters of the SOI structure by implementing a thick buried oxide layer (50-200 nm) combined with a thin semiconductor layer (5-50 nm). This parameter combination reduces parasitic capacitances while maintaining small device dimensions, thereby resolving the contradiction between integration density and parasitic effects.
Solution Approach 2:
The patent uses a composite structure consisting of multiple layers with different material properties: a thick buried oxide layer for electrical isolation, a thin semiconductor layer for active device operation, and nickel silicide contacts for low resistance. This composite approach allows simultaneous optimization of different parameters including reduced parasitic capacitance and maintained power handling.
2Reliability
If conventional techniques are used to decrease ON-state resistance, then RON is reduced, but device complexity increases and process feasibility decreases
Solution Approach 1:
The patent reduces ON-state resistance by changing the physical parameters of the source/drain regions through nickel silicide formation and selective removal processes. This achieves low RON without requiring complex multi-step doping or geometry modifications, thereby reducing overall process complexity while maintaining electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly decreases the product of ON-state resistance and OFF-state capacitance (RON×COFF), thereby enhancing maximum power handling (PMAX) and improving overall RF performance.
Implementation Method 1
SOI is generally suitable for switches utilized in logic and digital applications
Implementation Method 2
engineering of source and drain regions using nickel silicides, to minimize OFF-state capacitance and maintain or decrease ON-state resistance
Data Source
AI summary
A radio frequency (RF) switch includes a semiconductor-on-insulator (SOI) substrate including a handle wafer, a buried oxide over the handle wafer, and a thin semiconductor layer over the buried oxide. A transistor is situated in the thin semiconductor layer and includes a gate, a source, a drain. The buried oxide can have a thickness of approximately two thousand angstroms (2,000 Å) to approximately six thousand angstroms (6,000 Å). The thin semiconductor layer has a thickness less than approximately four hundred angstroms (400 Å), so as to increase maximum power handling (PMAX) of the transistor. Nickel silicides can be situated on the source and the drain in an upper portion of the thin semiconductor layer. The RF switch can be one of a plurality of RF switches situated between an RF input and an RF output of an RF device.