RF Spur Cancellation Circuit for Phase Noise and IMD2 Control

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Solution Overview

Problem

Multimode transceivers face interference challenges due to spur frequency components from local oscillators and simultaneous transmission and reception, leading to signal degradation, and require improved methods for noise reduction and distortion cancellation to maintain performance across various operation modes and higher data throughput requirements.

Innovation Solution

The implementation of a compact architecture for continuous wave (CW) spur cancellation using least squares adaptation and phase noise reduction techniques, including all-digital phase locked loops (ADPLLs) with digital low-pass filters and time-to-digital converters, along with systems for second-order intermodulation distortion (IMD2) cancellation, to mitigate interference and enhance signal quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If RF signal bandwidth and modulation order are increased to increase data throughput, then data throughput is improved, but signal-to-noise ratio and error vector magnitude targets become harder to meet

Engineering Contradiction:

Improvedata throughputVSAvoidsignal-to-noise ratio

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent converts harmful phase noise and spur interference into beneficial information by using them as reference signals for estimation. The phase noise estimator uses the known pilot symbols and received signals to estimate phase noise characteristics, then uses this estimation to cancel the phase noise from the received signals, thereby improving signal quality and enabling higher throughput operations

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If phase locked loops are designed to meet stringent phase noise requirements, then signal-to-noise ratio is improved, but device complexity increases

Engineering Contradiction:

Improvesignal-to-noise ratioVSAvoidphase locked loop complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces complex analog phase-locked loop circuits with a digital signal processing approach. Instead of using analog filters and oscillators to reduce phase noise, the system uses digital estimation and cancellation algorithms that operate on the received signals after analog-to-digital conversion, thereby reducing analog circuit complexity while achieving the same phase noise mitigation goals

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the approach from modifying hardware parameters (analog filter bandwidth, oscillator design) to adjusting software/digital processing parameters (estimation window size, filter coefficients, cancellation strength). This allows flexible optimization of phase noise performance without changing the fundamental hardware architecture

Inventive Principle:

Principle #35Parameter changes

3Reliability

If spur cancellation techniques are implemented to reduce interference, then signal quality is improved, but processing time and computational load increase

Engineering Contradiction:

Improvesignal qualityVSAvoidprocessing time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent performs spur and phase noise estimation and cancellation in advance during the reception processing pipeline, before final signal decoding. By estimating phase noise characteristics early and canceling them proactively, the system prevents degradation rather than correcting it later, reducing overall processing time for subsequent stages

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11146276B2Noise reduction and spur and distortion cancellation techniques

Publication Date: 2021.10.12 INTEL CORP

AI summary

A wireless communication device can include an antenna configured to sense a radio frequency (RF) signal. The wireless communication device can include signal estimation circuitry configured to generate estimates of amplitude and frequency for unmodulated spurs within the RF signal. The wireless communication device can further include multi-tone generator circuitry coupled to the signal estimation circuitry and configured to generate a composite spur cancellation signal based on the estimates of amplitude and frequency for unmodulated spurs within the RF signal. The wireless communication device can further include adder circuitry configured to subtract the spur cancellation signal from the RF signal to generate a spur cancelled signal.