RF Transistor Stack Gate Capacitor Topology for Higher Stack Height
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Solution Overview
Problem
Existing amplifier circuits with stacked transistors face challenges in achieving practical realization of large stack heights due to decreasing capacitance values of gate capacitors, which become comparable to parasitic/stray capacitances, making it difficult to maintain a desired voltage distribution across transistors, especially as the number of transistors increases.
Innovation Solution
The proposed solution involves a monolithically integrated circuit arrangement with a cascode configuration of transistors, where gate capacitors are coupled in specific configurations to maintain higher capacitance values, allowing for a desired distribution of RF voltage across the transistors, thereby enabling larger stack heights and practical implementation of higher output power amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the number of transistors in the stack increases to achieve higher output power, then the output power capability is improved, but the gate capacitance values decrease to values comparable to parasitic/stray capacitances, making practical realization difficult
Solution Approach 1:
The patent combines multiple gate capacitors in parallel to achieve the desired total capacitance value. Specifically, first and second gate capacitors are connected in parallel between the gate and source of the upper transistor, and third and fourth gate capacitors are connected in parallel between the gate and source of the lower transistor. This merging approach allows the circuit to achieve higher effective capacitance values that overcome parasitic/stray capacitances while maintaining the increased stack height configuration for higher output power capability.
2Stability of the object's composition
If gate capacitor capacitance values are decreased to maintain voltage distribution in larger stacks, then the voltage distribution is maintained, but the capacitance values become comparable to parasitic/stray capacitances, rendering practical realization challenging
Solution Approach 1:
The patent merges multiple gate capacitors in parallel configurations to achieve the desired total capacitance values. By connecting first and second gate capacitors in parallel for the upper transistor, and third and fourth gate capacitors in parallel for the lower transistor, the circuit maintains stable voltage distribution across the transistor stack while achieving sufficiently large capacitance values that dominate over parasitic/stray capacitances, enabling practical realization.
Solution Approach 2:
The patent uses composite capacitor structures formed by combining multiple capacitor elements in parallel. This composite approach allows the gate capacitor assembly to provide both the required capacitance value for stable voltage distribution and sufficient margin over parasitic capacitances for practical manufacturing realization in integrated circuits.
3Power
If stack height is increased to operate from higher supply voltage, then the output power capability is improved, but the individual transistor voltage withstand requirements become more stringent
Solution Approach 1:
The patent segments the high voltage supply across multiple transistors connected in series (stacked configuration). By dividing the voltage burden across several individual transistors rather than requiring a single transistor to withstand the full high voltage, the circuit achieves higher output power capability from higher supply voltage while each individual transistor operates within its voltage withstand capabilities. The gate capacitor network further supports this segmentation by maintaining proper voltage distribution across the stacked transistors.
Data Source
AI summary
Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.