RF Substrate Trenches With Resistive Fillers for Parasitic Isolation
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Solution Overview
Problem
Existing radiofrequency (RF) device substrates face challenges in maintaining low insertion losses, signal linearity, and thermal stability across a wide temperature range, while being cost-effective and compatible with semiconductor manufacturing, due to issues with parasitic conduction and permittivity matching.
Innovation Solution
A substrate with a support substrate of high resistivity semiconductor material and trenches filled with a highly resistive material, isolating small dimensions of the semiconductor material to increase effective resistivity and thermal conductivity, while reducing capacitive coupling and maintaining stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon-on-sapphire substrates are used to achieve low insertion losses and good linearity, then RF device performance is improved, but manufacturing cost increases significantly
Solution Approach 1:
The substrate is segmented into multiple functional layers: a silicon support substrate providing mechanical strength and thermal conductivity, a buried oxide layer providing electrical insulation, and a silicon-on-oxide active layer providing RF performance. This segmentation allows each layer to contribute its advantageous properties while avoiding the high cost of sapphire substrates.
Solution Approach 2:
The invention uses a composite substrate structure combining silicon and oxide materials. The silicon support substrate provides high thermal conductivity (20 W/m·K) and mechanical strength, while the buried oxide layer provides electrical insulation and low permittivity (εr=3.9), creating a composite material system that achieves RF performance comparable to sapphire at lower cost.
2Reliability
If high resistivity silicon substrates are used to reduce parasitic conduction, then signal linearity is improved, but thermal conductivity decreases
Solution Approach 1:
The substrate is divided into a support substrate region and an active layer region separated by a buried oxide layer. The support substrate can be high resistivity silicon for signal linearity, while the buried oxide layer acts as a thermal management interface, allowing heat to be conducted away from the active region without compromising electrical performance.
Solution Approach 2:
The buried oxide layer serves as an intermediary between the support substrate and the active silicon layer. It provides electrical isolation to prevent parasitic conduction and improve signal linearity, while its thermal properties allow it to act as a thermal management layer, facilitating heat dissipation from the active region.
3Loss of energy
If standard silicon substrates are used to maintain thermal conductivity, then heat dissipation is improved, but parasitic conduction increases
Solution Approach 1:
The substrate structure segments the electrical conduction paths from the thermal conduction paths. The buried oxide layer creates electrical isolation between the support substrate and active layer, blocking parasitic conduction, while the silicon support substrate maintains its high thermal conductivity for effective heat dissipation from the active region.
Solution Approach 2:
The buried oxide layer acts as an intermediary that differentially affects thermal and electrical transport. It has low electrical conductivity to block parasitic conduction paths, yet its thermal conductivity is sufficient to allow heat to pass through from the active layer to the support substrate for dissipation.
4Ease of manufacture
If silicon substrates are used to ensure compatibility with CMOS manufacturing, then manufacturing cost is reduced, but capacitive coupling between active layer and substrate increases
Solution Approach 1:
The buried oxide layer serves as an intermediary dielectric layer between the active silicon layer and the silicon support substrate. This oxide layer has low permittivity (εr=3.9) compared to silicon (εr=11.7), which reduces the capacitive coupling between the active devices and the substrate, minimizing substrate effects on RF performance while maintaining CMOS manufacturing compatibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively blocks parasitic conduction, maintains high resistivity and thermal conductivity, and reduces signal distortion, ensuring stable RF performance across a wide temperature range and frequency spectrum.
Implementation Method 1
A substrate with a support substrate of high resistivity semiconductor material and trenches filled with a highly resistive material, isolating small dimensions of the semiconductor material to increase effective resistivity
Implementation Method 2
maintains high resistivity and thermal conductivity, and reduces signal distortion, ensuring stable RF performance across a wide temperature range
Data Source
AI summary
Substrates for microelectronic radiofrequency devices may include a substrate comprising a semiconductor material. Trenches may be located in an upper surface of the substrate, at least some of the trenches including a filler material located within the respective trench. A resistivity of the filler material may be 10 kOhms·cm or greater. A piezoelectric material may be located on or above the upper surface of the substrate. Methods of making substrates for microelectronic radiofrequency devices may involve forming trenches in an upper surface of a substrate including a semiconductor material. A filler material may be placed in at least some of the trenches, and a piezoelectric material may be placed on or above the upper surface of the substrate.