RF Ground Plane Superlattice for Mobility and Breakdown Tradeoffs
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Solution Overview
Problem
Current semiconductor devices face limitations in achieving enhanced performance due to constraints in charge carrier mobility and breakdown characteristics, particularly in radio frequency (RF) applications.
Innovation Solution
The development of a radio frequency (RF) semiconductor device incorporating a conductive superlattice with doped base semiconductor monolayers and non-semiconductor monolayers constrained within a crystal lattice, forming an enhanced semiconductor-on-insulator substrate, which reduces effective mass and improves mobility, and is used to create a highly doped ground plane layer for improved breakdown voltage and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional semiconductor structures are used, then manufacturing simplicity is maintained, but charge carrier mobility is limited
Solution Approach 1:
The ground plane layer is segmented into multiple alternating monolayers of base semiconductor material and non-semiconductor material, creating a superlattice structure. This segmentation enables enhanced charge carrier mobility through reduced scattering effects while maintaining a manageable structural complexity through periodic repetition of the monolayer sequence.
Solution Approach 2:
The invention employs composite material structure by combining base semiconductor monolayers with non-semiconductor monolayers to form a superlattice. This composite approach leverages the beneficial properties of both material types to achieve improved charge carrier mobility and breakdown characteristics that cannot be obtained with conventional homogeneous semiconductor structures.
2Reliability
If higher doping concentrations are used to improve conductivity, then ON-state resistance decreases, but breakdown voltage decreases
Solution Approach 1:
The superlattice structure introduces local quality variations through alternating monolayers with different electrical properties. The non-semiconductor monolayers provide regions of high conductivity for low ON-state resistance, while the base semiconductor monolayers maintain breakdown characteristics, allowing the ground plane to simultaneously achieve low resistance and high breakdown voltage.
Solution Approach 2:
The invention changes the electrical parameters of the ground plane by creating a superlattice with alternating high-conductivity and breakdown-resistant layers. This parameter modification enables the ground plane to operate with effective low resistance at operating conditions while maintaining high breakdown voltage through the periodic structure.
3Use of energy by moving object
If thinner ground plane layers are used to reduce capacitance, then junction capacitance decreases, but conductivity decreases
Solution Approach 1:
The thin ground plane achieves high conductivity despite reduced thickness by employing a composite superlattice structure. The alternating monolayers of base semiconductor and non-semiconductor materials create pathways for efficient charge carrier transport, compensating for the reduced overall thickness and maintaining low junction capacitance while ensuring adequate conductivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in increased charge carrier mobility, reduced scattering effects, and enhanced breakdown voltage, enabling more efficient RF semiconductor devices with improved performance metrics such as lower ON-state resistance and maintained junction capacitance.
Implementation Method 1
at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent doped base semiconductor portions
Implementation Method 2
reduced scattering effects, and enhanced breakdown voltage
Data Source
AI summary
A method for making a radio frequency (RF) semiconductor device may include forming an RF ground plane layer on a semiconductor-on-insulator substrate and including a conductive superlattice. The conductive superlattice may include stacked groups of layers, with each group of layers including stacked doped base semiconductor monolayers defining a doped base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent doped base semiconductor portions. The method may further include forming a body above the RF ground plane layer, forming spaced apart source and drain regions adjacent the body and defining a channel region in the body, and forming a gate overlying the channel region.